Department of Electrical and Computer Engineering George Mason University Volgenau School of Engineering

Senior Design Projects

If you are interested in any of the Senior Design Projects I propose below, please contact me. Project suggestions by other faculty can be found on the ECE 492 web page.

New Senior Design Projects

I'm interested in advising senior design projects on the following topics.
  • GMU Logic Analyzer
    Logic analyzers are electronic instruments that are used to capture and display signals from a digital circuit/system. Typically, logic analyzers display the captured data as timing diagrams, which portray logic voltage levels over time. Most logic analyzers are also capable of interpreting the data for several common serial communication protocols such as I2C and SPI. Simple logic analyzers that have to be attached to a PC cost fromn $200 (8 channels, 100 MS/s) to more than $10,000 (32 channels and 500 MS/s). Logic analyzers are extremely useful for debugging digital circuits including microprocessor and micro-controller systems such as the ones used in ECE 331, ECE 445, ECE 447, etc. In this project you will be developing a logic analyzer based on the BASYS2/3 boards that all ECE undergraduates have to buy for ECE 331. This project consists of 3 parts.
    1. Input protection and conditioning circuit to convert logic levels from design under test to logic levels acceptable by the Xilinx FPGA on the BASYS2/3 board.
    2. Data capture and storage logic for the Xilinx FPGA.
    3. Data display and analysis software for the PC. The data is transfered from the FPGA trough USB to the PC.
    Public domain projects in this area already exist, e.g. Openbench Logic Sniffer and FPGA Based Logic Analyzer, but your task will be to port them to the BASYS2/3 boards and therefore to enable all ECE students to have a capable logic analyzer almost for free.
    Prerequisite: At least one team-member must have successfully completed ECE 447 and one ECE 448.
  • FPGA enhanced Wireless Sensor Nodes based on MSP 430
    A wireless sensor network is a system of individual sensor nodes, each equipped with a processor, wireless transceiver and sensor. Each node collects information about its environment through sensors and passes it on to the base station. The goal of this project is to develop an FPGA enhanced wireless sensor node similar to the one developed by a group from Universidad Politécnica de Madrid, Spain but based on the MSP 430 microcontroller. MSP 430 based open source motes are the Telos Mote and the newer EPIC Mote. The group has to study the schematics of the open source motes, prototype one and develop an FPGA interface (e.g. SPI, I2C or better). After successful prototyping a PCB has to be made for the new sensor node.
    Prerequisite: At least one team-member must have successfully completed ECE 447 and one ECE 448.

Currently in Progress

  • none

Previous Senior Design Projects

  • T. Cao, D. Jin, S. Kiflemariam, M. Mekonnen, and B. Pierre, Secure USB storage, George Mason University, Fairfax, VA, USA, May, 2015, Senior Design Project Report [Bibtex]
  • K. Briggs, S. Carlson, C. Gibbons, J. Page, A. Paris, and D. Wernli, Vocal command recognition utilizing parallel processing of multiple confidence-weighted algorithms in an FPGA, George Mason University, Fairfax, VA, USA, May, 2015, Senior Design Project Report [Bibtex] (Outstanding ECE Senior Design Project Award)
  • M. Damico, C. Bacon, and D. Luu, Nanogigapixel, George Mason University, Fairfax, VA, USA, May, 2014, Senior Design Project Report [pdf] [Bibtex]
  • D. Nguyen, G. Kidanu, D. Pham, T. Zewdie, Controlling a Temperature Controller, George Mason University, Fairfax, Virginia, USA, May, 2014, Senior Design Project Report
  • M. Nasri, M. Shabbir, M. Mehta, and G. Tewelde, Smart living room LED, George Mason University, Fairfax, VA, USA, Dec, 2012, Senior Design Project Report [pdf] [Bibtex]
  • E. Andia, F. Ta, and M. McGivern, Benchmarking hash functions on the MSP430, George Mason University, Fairfax, Virginia, USA, May, 2011, Senior Design Project Report [pdf] [Bibtex]
  • P. Adams and L. Walton, Differential power analysis testbed, George Mason University, Fairfax, Virginia, USA, May, 2011, Senior Design Project Report [pdf] [Bibtex]
  • K. Sato and G. Paudel, EducáTable: An interactive multitouch table for young children, George Mason University, Fairfax, Virginia, USA, May, 2010, Senior Design Project Report [pdf] [Bibtex] (Outstanding ECE Senior Design Project Award) (advised with Dr. Jill Nelson)
  • M. A. Huynh, J. Lapato, D. Burtner, and A. Morsy, Design of a FPGA-Based Hardware Platform to Support Software-Defined Radio, George Mason University, Fairfax, Virginia, USA, May, 2010, Senior Design Project Report (advised with Dr. Brian Mark)
  • A. V. Nguyen, S. Flood, D. Pham, and C. Nguyen, FPGA Integrated Sensor Node, George Mason University, Fairfax, Virginia, USA, May, 2010, Senior Design Project Report
  • A. Behnaz, B. Loop, E. Foroudi, and S. Dhawan, Behavioral algorithm sensor suite, George Mason University, Fairfax, VA, USA, Dec, 2009, Senior Design Project Report [pdf] [Bibtex]
  • K. Rizvi, J. Pham, M. McDermott, and R. Brown, Energy and power comparison of cryptographic algorithms on sensor nodes, George Mason University, Fairfax, VA, USA, May, 2009, Senior Design Project Report [pdf] [Bibtex]
  • B. Thomson, J. McCall, and S. Kaur, Cryptographic coprocessor for wireless sensors, George Mason University, Fairfax, VA, USA, December, 2008, Senior Design Project Report [pdf] [Bibtex]
  • J. Higgins, P. Patel, and P. Anderson, PDIS – Print data insertion system, George Mason University, Fairfax, VA, USA, April, 2008, Senior Design Project Report [pdf] [Bibtex] (Outstanding ECE Senior Design Project Award)