SHARCS 2012 in Washington D.C.

SHARCS 2012

CERG was an organizer of SHARCS 2012 - Special-Purpose Hardware for Attacking Cryptographic Systems workshop held in the Washington Marriott Hotel on March 17-18, 2012. Dr. Kaps served as a general chair of the workshop, and Dr. Gaj was one of the two co-chairs. Graduate students from CERG provided technical and logistic support during the event. This edition of SHARCS had more than 70 participants from 19 countries of 5 continents. The slides of all presentations and the workshop record are posted on the SHARCS 2012 website. An extensive record of the entire series, including all slides and papers from the previous workshops, is available at http://sharcs.org. (3/19/12)

Welcome to the webpage of the Cryptographic Engineering Research Group at George Mason University. Cryptography, from Greek krpto (hidden) and grapho (write), is the science and practice of hiding information. Most Internet users come in contact with cryptography when they go to a secure website of an Internet retailer. Other popular applications are secure e-mail, Internet banking, mobile phones, etc. Cryptography has its roots in mathematics, computer science and engineering. Cryptographic Engineering is concerned with all aspects of implementing cryptographic algorithms in hardware and / or software. This ranges from high performance implementations to ultra-low power implementations of public key and secret key algorithms, fault tolerant implementations, attack resistant implementation and even implementations of attacks.


Latest News:

Dr. Gaj gave a keynote speech at CANSec 2014

Dr. Gaj gave a keynote speech, entitled Battles of Cryptographic Algorithms: From AES to CAESAR in Software & Hardware, at the Fifth Central Area Networking and Security Workshop - CANSec 2014, hosted by University of Arkansas on April 4-5, 2014. (04/05/2014)


Dr. Kaps receives funding from Riscure North America, Inc.

Dr. Kaps received $20K from Riscure North America, Inc., for his project "Fault Analysis of Android Devices". (10/18/2013)


Dr. Gaj and Dr. Kaps awarded NSF grant

Dr. Gaj and Dr. Kaps received $486K from the National Science Foundation for their four-year project entitled "TWC: Option: Medium: Collaborative: Authenticated Ciphers". This project is a joint work with University of Illinois at Chicago, University of California-Davis, and California State University. (10/08/13)


Dr. Gaj and Ahmad Salman attended Microsemi Security Forum

Dr. Gaj and Ahmad Salman attended Microsemi Security Forum held on Monday, October 7, 2013 at the DoubleTree BWI hotel in Linthicum, MD. (10/07/13)


Dr. Gaj serves as a co-chair of the special track at ReConFig 2013

Dr. Gaj and Dr. Viktor Fischer from Université de Saint Etienne, France, are co-chairs of the special track on Reconfigurable Computing for Security and Cryptography at the 2013 International Conference on ReConFigurable Computing and FPGAs, ReConFig 2013, to be held in Cancun, Mexico, on Dec. 9-11, 2013. CERG students contributed several sub-reviews for papers submitted to this special track. (09/23/2013)


Ted Winograd passed Technical Qualifying Exam

Ted Winograd passed his PhD Technical Qualifying Exam in the area of Digital Design and Computer Organization. Congratulations! (09/18/2013)


Dr. Kaps spoke at DSD 2013

Dr. Kaps attended DSD 2013, the 16th Euromicro Conference on Digital System Design, held in Santander, Spain, on September 4-6, 2013. He presented the paper entitled "Glitch Detection in Hardware Implementations on FPGAs using Delay Based Sampling Techniques" by Rajesh Velegalati, Kinjal Shah and Jens-Peter Kaps, and the paper entitled "FPGA PUF based on Programmable LUT Delays" by Bilal Habib, Kris Gaj and Jens-Peter Kaps. (08/14/13)


Dr. Gaj attended CHES and PROOFS 2013

Dr. Gaj attended CHES 2013 the Cryptographic Hardware and Embedded Systems workshop, held in Santa Barbara, USA, on August 20-23, 2013, and PROOFS 2013 the Security Proofs for Embedded Systems workshop, held in Santa Barbara, USA, on August 24, 2013. (08/14/13)


Dr. Gaj attended DIAC 2013

Dr. Gaj attended DIAC 2013 the Directions in Authenticated Ciphers workshop, held at the University of Illinois at Chicago on August 11-13, 2013. (08/14/13)


Marcin Rogawski defended Ph.D. Thesis

Marcin Rogawski defended his Ph.D. thesis, entitled " Development and Benchmarking of New Hardware Architectures for Emerging Cryptographic Transformations," on July 25, 2013. The members of his Ph.D. thesis committee included Drs. Gaj, Kaps, Li, and Albanese. (07/26/13)


Dr. Gaj and Dr. Kaps spoke at CryptArchi 2013

Dr. Gaj and Dr. Kaps attended the 11th CryptArchi workshop on cryptographic architectures embedded in reconfigurable devices, held in Fréjus, France on June 23-26, 2013. Dr. Gaj gave a talk entitled "An FPGA-based Accelerator for Tate Pairing over Prime Fields" and Dr. Kaps gave a presentation entitled "Towards a Flexible, Opensource BOard for Side-channel analysis (FOBOS)". (05/22/13)


Dr. Gaj awarded two patents for Montgomery Multiplication Architectures

Dr. Gaj and Dr. Huang (University of Arkansas) have been awarded the U.S. patent no. 8,386,546 B2, entitled "Montgomery Multiplication Architecture," issued on February 26, 2013, and the U.S. patent no. 8,433,736 B2, entitled "Scalable Montgomery Multiplication Architecture," issued on April 30, 2013. Both patents are based on the paper "New Hardware Architectures for Montgomery Modular Multiplication Algorithm," (preprint) published in the IEEE Transactions on Computers in July 2011. The patents will remain valid for 20 years. (05/22/13)


Dr. Gaj is a member of the Program Committees of LightSec 2013, ReCoSoc 2013, CHES 2013, DSD 2013 and SPACE 2013

Dr. Gaj is a member of the Program Committees for the following conferences:

  • LightSec 2013: Second International Workshop on Lightweight Cryptography for Security & Privacy, to be held in Gebze, Turkey, on May 6-7, 2013
  • ReCoSoC 2013: 8th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, to be held in Darmstadt, Germany, on July 10-12, 2013
  • CHES 2013: Workshop on Cryptographic Hardware and Embedded Systems, to be held in Santa Barbara, USA, on August 20-23, 2013
  • DSD 2013: 16th Euromicro Conference on Digital System Design, to be held in Santander, Spain, on September 4-6, 2013
  • SPACE 2013: 3rd International Conference on Security, Privacy, and Applied Cryptography Engineering, to be held in Kharagpur, India, on October 19-23, 2013

(03/03/13)


Latest Publications:

Copyright Notice

The research papers below are presented here to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All person copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted on third party websites, reproduced, distributed, sold, or licensed without the explicit permission of the copyright holder.

  • B. Habib, K. Gaj, and J.-P. Kaps, FPGA PUF based on programmable LUT delays, 2013 Euromicro Conference on Digital System Design (DSD), pages 697–704, 2013 [accepted version, pdf] [Bibtex]
  • R. Velegalati, K. Shah, and J.-P. Kaps, Glitch detection in hardware implementations on FPGAs using delay based sampling techniques, 2013 Euromicro Conference on Digital System Design (DSD), pages 947–954, 2013 [Bibtex]
  • M. Rogawski, K. Gaj, and E. Homsirikamol, A high-speed unified hardware architecture for 128 and 256-bit security levels of AES and the SHA-3 candidate Grostl, Microprocessors and Microsystems, volume 37, number 6-7, pages 572-582, 2013 [Bibtex]
  • R. Velegalati and J.-P. Kaps, Towards a Flexible, Opensource BOard for Side-channel analysis (FOBOS), June, 2013, Cryptographic architectures embedded in reconfigurable devices, CRYPTARCHI 2013 [pdf] [Bibtex]
  • B. Brewster, E. Homsirikamol, R. Velegalati, and K. Gaj, Option Space Exploration Using Distributed Computing for Efficient Benchmarking of FPGA Cryptographic Modules, 2012 International Conference on Field Programmable Technology - FPT, Dec, 2012 [Bibtex]
  • S. Paul, E. Homsirikamol, and K. Gaj, A Novel Permutation-based Hash Mode of Operation FP and The Hash Function SAMOSA, 13th International Conference on Cryptology in India - Indocrypt, Dec, 2012 [Bibtex]
  • M. Rogawski and K. Gaj, A High-Speed Unified Hardware Architecture for AES and the SHA-3 Candidate Grostl, 15th EUROMICRO Conference on Digital System Design – DSD 12, 2012 [Bibtex]
  • K. Gaj, E. Homsirikamol, M. Rogawski, R. Shahid, and M.U. Sharif, Comprehensive Evaluation of High-Speed and Medium-Speed Implementations of Five SHA-3 Finalists Using Xilinx and Altera FPGAs, Jun., 2012 [Bibtex]
  • R. Velegalati and J.-P. Kaps, Introducing FOBOS: Flexible Open-source BOard for Side-channel analysis, May, 2012, Work in Progress (WiP), Third International Workshop on Constructive Side-Channel Analysis and Secure Design, COSADE 2012 [pdf] [Bibtex]
  • C. Wenzel-Benner, J. Gr"af, J. Pham, and J.-P. Kaps, XBX benchmarking results January 2012, Mar, 2012 [pdf] [Bibtex] Third {SHA-3} candidate conference
  • J.-P. Kaps, P. Yalla, K.K. Surapathi, B. Habib, S. Vadlamudi, and S. Gurung, Lightweight implementations of SHA-3 finalists on FPGAs, Mar, 2012 [pdf] [Bibtex] Third {SHA-3} candidate conference
  • K. Gaj, E. Homsirikamol, M. Rogawski, R. Shahid, and M.U. Sharif, Comprehensive Evaluation of High-Speed and Medium-Speed Implementations of Five SHA-3 Finalists Using Xilinx and Altera FPGAs, Mar, 2012 [Bibtex] Third {SHA-3} candidate conference
  • F.K. G"urkaynak, K. Gaj, B. Muheim, E. Homsirikamol, C. Keller, M. Rogawski, H. Kaeslin, and J.-P. Kaps, Lessons learned from designing a 65nm ASIC for evaluating third round SHA-3 candidates, Mar, 2012 [pdf] [Bibtex] Third {SHA-3} candidate conference