Post-Quantum Cryptography in Hardware and Embedded Systems

Post-Quantum Cryptography

Major investment by companies, such as Google, IBM, Intel, Microsoft, and NTT, has led to the first general-purpose quantum processors, and selecting quantum computing as one of the ten breakthrough technologies of 2017. The goal of this project is to support NIST in its effort to develop a new generation of public-key cryptographic standards, resistant against quantum computers, a.k.a. NIST Post-Quantum Cryptography (PQC) Standardization Process. In Round 1 of this effort, the assessment of PQC candidates has focused primarily on their security and software efficiency. Relatively little progress has been made so far to understand the true potential of these algorithms for efficient and secure hardware and embedded systems implementations. The goal of this project is to set the foundation for the early, systematic, and comprehensive study of the hardware efficiency of the most promising PQC candidates. The next 5-10 years are very likely to bring the biggest revolution in cryptography, since the invention of public-key cryptography in mid-1970s. This project gives us a unique opportunity to influence the choice of future cryptographic standards, which are likely to be developed and deployed within the next decade and remain in use for the significant portion (if not the rest) of the 21st century.

Welcome to the webpage of the Cryptographic Engineering Research Group at George Mason University. Cryptography, from Greek krpto (hidden) and grapho (write), is the science and practice of hiding information. Most Internet users come in contact with cryptography when they go to a secure website of an Internet retailer. Other popular applications are secure e-mail, Internet banking, mobile phones, etc. Cryptography has its roots in mathematics, computer science and engineering. Cryptographic Engineering is concerned with all aspects of implementing cryptographic algorithms in hardware and / or software. This ranges from high performance implementations to ultra-low power implementations of public key and secret key algorithms, fault tolerant implementations, attack resistant implementation and even implementations of attacks.


Job Announcements:

GRA Positions in Post-Quantum Cryptography

CERG is seeking qualified candidates for multiple Graduate Research Assistant positions in the area of efficient implementations of Post-Quantum Cryptosystems, side-channel attacks targeting these cryptosystems, and countermeasures against such attacks. The desired qualifications include strong mathematical background in algebra and number theory, experience in hardware design using hardware description languages, and knowledge of C and scripting languages, such as Python. Additional experience in Magma or SageMath, ASIC or FPGA design, software/hardware codesign, High-Level Synthesis, embedded software development, and Linux operating system is a plus.

GRA Position in Lightweight Cryptography

CERG is seeking qualified candidates for a Graduate Research Assistant position in the area of efficient and secure implementations of Lightweight Cryptography. The desired qualifications include experience in embedded systems, knowledge of C, assembly and scripting languages, hardware design using hardware description languages, Linux operating system, and strong experimental skills. Additional experience in side-channel and fault attacks, countermeasures against these attacks, ASIC or FPGA design, software/hardware codesign, embedded software development, and/or circuit/PCB design is a plus.

All positions are open starting in August 2021 or January 2022. Qualified candidates should apply to the ECE PhD program at George Mason University, indicating Dr. Gaj and/or Dr. Kaps as possible future advisors. In parallel, an earlier e-mail contact with Dr. Gaj and/or Dr. Kaps is highly recommended.


Latest News:

Dr. Bhasin and Dr. Gaj co-organize special session at DATE 2021

Dr. Shivam Bhasin from Nanyang Technological University, Singapore, and Dr. Kris Gaj co-organize a special session at DATE 2021: Design, Automation and Test in Europe conference. The session is titled "A deep dive into future of lightweight cryptography: New standards, optimizations, and attacks." It will include four talks devoted to presenting recent research results, covering different aspects of the security and performance of authenticated ciphers and hash functions, submitted to the NIST LWC Standardization Process. (11/24/2020)


Javad Bahrami gave a talk at ASHES 2020

Javad Bahrami attended the Fourth Workshop on Attacks and Solutions in Hardware Security, ASHES 2020, a post-conference satellite workshop of the 27th ACM Conference on Computer and Communications Security, CCS 2020. The workshop was held on November 13, 2020. During this workshop, Javad Bahrami gave a talk titled "Lightweight Implementation of the LowMC Block Cipher Protected Against Side-Channel Attacks," based on the paper co-authored with Viet Ba Dang, Abubakr Abdulgadir, Khaled N. Khasawneh, Jens-Peter Kaps, and Kris Gaj. This year, ACM CCS and all its workshops, including ASHES, took place as virtual events. (11/14/2020)


Dr. Gaj served as a member of the Program Committee of DATE 2021

Dr. Gaj served as a member of the Program Committee of DATE 2021: Design, Automation and Test in Europe conference, in Track A5: Secure Systems, Circuits, and Architectures. Multiple student members of CERG contributed their time and expertise, serving as sub-reviewers for the mentioned above track. The virtual TPC Meeting was held on November 10, 2020. (11/11/2020)


Dr. Gaj gave the first talk of the PQC Round 3 Seminar Series

On October 27, 2020, Dr. Gaj gave the first talk of the newly launched Post-Quantum Cryptography Round 3 Seminar Series, organized by NIST. His talk was titled "Implementation and Benchmarking of Round 2 Candidates in the NIST Post-Quantum Cryptography Standardization Process Using FPGAs." The corresponding slides and video recording are available here. The talk was based on the comprehensive GMU Round 2 report, "Implementation and Benchmarking of Round 2 Candidates in the NIST Post-Quantum Cryptography Standardization Process Using Hardware and Software/Hardware Co-design Approaches," developed by Viet Ba Dang, Farnoud Farahmand, Michal Andrzejczak, Kamyar Mohajerani, Duc Tri Nguyen, and Kris Gaj. This report was published on Cryptology ePrint Archive, as Report 2020/795, for the first time in June 2020. It has been updated several times since then. The talk and report include an extensive literature review and unpublished results from GMU. The focus is on methodology and rankings. The NIST PQC team is planning to host future talks, open to the general public, devoted to Round 3 of the PQC process, approximately once per month using the Webex video conferencing software. These talks will be recorded by NIST, given closed-captioning, etc. The recordings will be posted on the NIST website. The talks will be divided into two tracks: Implementations - devoted to hardware and software benchmarking, software/hardware co-design, and side-channel analysis - and Algorithms - devoted to the design and analysis of post-quantum schemes, classical attacks, and quantum attacks. (10/28/2020)


Dr. Gaj gave a keynote speech at CryptoIC 2020

On October 27, 2020, Dr. Gaj gave a keynote speech at CryptoIC 2020. CryptoIC is a conference held annually by the Cryptographic IC Technical Committee of the Chinese Association for Cryptologic Research. Dr. Gaj's talk was titled "Benchmarking Post-Quantum & Lightweight Cryptography in Hardware." The conference was attended by more than 300 researchers from academia, industry, and research institutes. Due to the COVID-19 pandemic, CryptoIC 2020 was converted into an all-digital event. The talk was given at the invitation of Dr. Leibo Liu, Secretary-General of Cryptographic IC Technical Committee of Chinese Association for Cryptologic Research. Some other keynote speakers included Dr. Bo-Yin Yang from Academia Sinica, Taipei; Dr. Nele Mentens from Leiden University and KU Leuven; and Dr. Sylvain Guilley from TELECOM-Paris / Institut Polytechnique de Paris and Secure-IC. The conference was organized by Harbin University of Science and Technology and Harbin Institute of Technology. (10/28/2020)


Duc T. Nguyen gave a poster presentation at ARC 2020

Duc T. Nguyen attended the 16th International Symposium on Applied Reconfigurable Computing, ARC 2020, held as a virtual event on October 26-27, 2020. During this conference, Duc gave a poster presentation titled, "Implementing and Benchmarking Number Theoretic Transform in Lattice-based Post-Quantum Cryptography using SW/HW Codesign and High Level Synthesis," based on the paper co-authored with Viet Ba Dang and Kris Gaj. (10/28/2020)


CERG released its report on FPGA benchmarking of Round 2 LWC candidates

On September 28, 2020, members of CERG released their technical report titled "FPGA Benchmarking of Round 2 Candidates in the NIST Lightweight Cryptography Standardization Process: Methodology, Metrics, Tools, and Results." The report was co-authored by Kamyar Mohajerani, Richard Haeussler, Rishub Nagpal, Farnoud Farahmand, Abubakr Abdulgadir, Jens-Peter Kaps, and Kris Gaj. The report was published first on the LWC web page of the CERG ATHENa project. After a few revisions, taking into account feedback from the readers, on October 2, 2020, the report was first published as the Cryptology ePrint Archive Report 2020/1207. The report is intended as a living document and will be updated at least until the end of 2020. (10/26/2020)


Dr. Kaps and Dr. Gaj gave a talk at the Lightweight Cryptography Workshop 2020

Multiple members of CERG attended the Lightweight Cryptography Workshop 2020, held on October 19-21, 2020. During this workshop, Dr. Kaps and Dr. Gaj gave a talk titled "FPGA Benchmarking of Round 2 Candidates in the NIST Lightweight Cryptography Standardization Process: Methodology, Metrics, Tools, and Results." The full agenda of the workshop is available here. (10/22/2020)


Dr. Gaj gave a keynote talk at China Test Conference 2020

Dr. Gaj gave a keynote talk at China Test Conference, CTC 2020, held on August 20-23, 2020. The talk was titled "Post-Quantum Cryptography in Hardware and Embedded Systems: Toward Choosing the Most Efficient and Flexible New Public Key Cryptography Standards." CTC is the annual conference of the China Computer Federation (CCF) Technical Committee on Fault-Tolerant Computing (TCFTC), which was established in 1985. In 2020, due to COVID-19, the conference was held both on-site and online simultaneously. Dr. Gaj's talk was given at the invitation of Dr. Jing (Justin) Ye, Secretary-General of CCF TCFTC and Associate Professor at State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences. (08/25/2020)


Dr. Gaj gave an invited talk as a part of the CALAS seminar series

At the invitation of Dr. Ray C.C. Cheung and Dr. David Jingwei Hu, Dr. Gaj gave an invited talk as a part of the CALAS Crypto Seminar Series. The talk was titled "Implementation and Benchmarking of Round 2 Candidates in the NIST Post-Quantum Cryptography Standardization Process Using FPGAs" and was held on August 19, 2020. CityU Architecture Lab for Arithmetic and Security (CALAS) is a research lab at the City University of Hong Kong, led by Dr. Ray C.C. Cheung, conducting cutting edge scholarly research activities in the areas of Reconfigurable Trusted Computing, VLSI/FPGA Circuit Design, Memory Architecture Design, Cryptography, System-on-Chip, High-Performance and Customizable Biomedical Computing, Embedded System Design, and Logic Synthesis. The CALAS seminar series is co-organized by Dr. David Jingwei Hu, who is a postdoctoral research fellow at Nanyang Technological University, Singapore. Dr. Hu received his Ph.D. degree in electronic engineering from the City University of Hong Kong in 2018. His current research interests include post-quantum cryptography and fully homomorphic encryption. Dr. Hu co-invented the post-quantum algorithm called piglet, which won 3rd place in the cryptographic design competition held by the Chinese Association for Cryptologic Research in 2019. (08/19/2020)


Farnoud Farahmand defended his Ph.D. Thesis

Farnoud Farahmand defended his Ph.D. Thesis, titled "Efficient and Secure Implementation of Secret-key and Post-quantum Public-key Cryptography with Applications in Internet of Things, Hardware Security, and Cloud Computing," on July 30, 2020. The members of his dissertation committee included Dr. Gaj (Chair), Dr. Kaps, Dr. Sasan, and Dr. Diehl. In June 2020, Farnoud accepted the position of the SoC Power Engineer at Apple. (07/31/2020)


CERG released its report on benchmarking of Round 2 PQC candidates

On June 2, 2020, members of CERG released their technical report titled "Implementation and Benchmarking of Round 2 Candidates in the NIST Post-Quantum Cryptography Standardization Process Using Hardware and Software/Hardware Co-design Approaches." The report was co-authored by Viet Ba Dang, Farnoud Farahmand, Michal Andrzejczak, Kamyar Mohajerani, Duc Tri Nguyen, and Kris Gaj. The report was published first on the PQC web page of the CERG ATHENa project. After a few revisions, taking into account feedback from the readers, on June 25, 2020, the report was first published as the Cryptology ePrint Archive Report 2020/795. The report is intended as a living document and will be updated at least until the end of 2020. (06/26/2020)


Dr. Kaps, Dr. Gaj, and Dr. Diehl gave progress report to the NIST Lightweight Cryptography Team

On April 20, 2020, Dr. Kaps, and Dr. Gaj, and Dr. Diehl gave a progress report to the NIST Lightweight Cryptography Team, titled "Hardware Benchmarking of Candidates in the NIST Lightweight Cryptography Standardization Process." The online meeting was led by Kerry McKay and Meltem Sonmez Turan. The meeting was attended by several members of the NIST LWC Team, several student members of the Signatures Analysis Laboratory (SAL) at Virginia Tech, and multiple members of CERG. (04/21/2020)


Dr. Gaj gave a talk at VTS 2020

Dr. Gaj gave a talk at the IEEE VLSI Test Symposium 2020 (Virtual Conference), held on April 27 - May 31, 2020. His presentation titled, "Challenges and Rewards of Post-Quantum Cryptography Revolution: A Hardware Perspective," was a part of the special session on The Recent Advance in Hardware Implementation of Post-Quantum Cryptography, organized by Dr. Ujjwal Guin from Auburn University. The entire session was based on the joint paper, titled "Special Session: The Recent Advance in Hardware Implementation of Post-Quantum Cryptography," co-authored by Jiafeng Xie, Kanad Basu, Kris Gaj, and Ujjwal Guin. (04/24/2020)


Michael Lyons gave a presentation at DATE 2020

Michael Lyons gave a short presentation at the Design, Automation and Test in Europe Virtual Conference and Exhibition, DATE 2020, held on April 21 - May 31, 2020. This presentation was based on the paper titled "Sampling from Discrete Distributions in Combinational Hardware with Application to Post-Quantum Cryptography," co-authored with Dr. Gaj. (04/22/2020)


CERG paper published in proceedings of ARC 2020

CERG paper titled "High-Level Synthesis in Implementing and Benchmarking Number Theoretic Transform in Lattice-based Post-Quantum Cryptography using Software/Hardware Codesign," co-authored by Duc Tri Nguyen, Viet B. Dang, and Kris Gaj, was published in the proceedings of the 16th International Symposium on Applied Reconfigurable Computing, ARC 2020, originally scheduled in Toledo, Spain, on April 1-3, 2020. Due to the concerns regarding COVID-19, the conference itself has been postponed to a later date. (04/04/2020)


Dr. Kaps and Dr. Gaj moved their Spring 2020 courses online

Starting on March 23, Dr. Kaps and Dr. Gaj moved their courses, taught in Spring 2020, online. These courses include: ECE 476/CYSE 476: Cryptography Fundamentals and ECE 448: FPGA and ASIC Design with VHDL. A distance-education platform used for delivering these courses is Blackboard Collaborate Ultra. In ECE 476/CYSE 476 students get familiar with selected implementations of cryptographic algorithms and protocols and with the FOBOS side-channel analysis platform, which can be now accessed remotely from student homes. (03/24/2020)


Latest publications:

Copyright Notice

The research papers below are presented here to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All person copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted on third party websites, reproduced, distributed, sold, or licensed without the explicit permission of the copyright holder.

  • J. Bahrami, V. Dang, A. Abdulgadir, K.N. Khasawneh, J.-P. Kaps, and K. Gaj, Lightweight implementation of the lowmc block cipher protected against side-channel attacks, Proc. 4th ACM Workshop on Attacks and Solutions in Hardware Security, ASHES 2020, pages 45-56, Nov, 2020 [pdf] [Bibtex]
  • J. Xie, K. Basu, K. Gaj, and U. Guin, Special session: The recent advance in hardware implementation of post-quantum cryptography, IEEE VLSI Test Symposium 2020 (Virtual Conference), Apr., 2020 [Bibtex]
  • M.X. Lyons and K. Gaj, Sampling from discrete distributions in combinational hardware with application to post-quantum cryptography, Design, Automation and Test in Europe Virtual Conference and Exhibition, DATE 2020, Apr, 2020 [Bibtex]
  • D.T. Nguyen, V.B. Dang, and K. Gaj, High-level synthesis in implementing and benchmarking number theoretic transform in lattice-based post-quantum cryptography using software/hardware codesign, 16th International Symposium on Applied Reconfigurable Computing, ARC 2020, pages 247-257, April, 2020 [Bibtex]
  • A. Abdulgadir, W. Diehl, and J.-P. Kaps, An open-source platform for evaluation of hardware implementations of lightweight authenticated ciphers, 2019 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2019, Cancun, Mexico, Dec., 2019 [Bibtex]
  • M. Andrzejczak, F. Farahmand, and K. Gaj, Full hardware implementation of the post-quantum public-key cryptography scheme Round5, 2019 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2019, Cancun, Mexico, Dec., 2019 [Bibtex]
  • V.B. Dang, F. Farahmand, M. Andrzejczak, and K. Gaj, Implementing and benchmarking three lattice-based post-quantum cryptography algorithms using software/hardware codesign, 2019 International Conference on Field Programmable Technology, FPT 2019, Tianjin, China, pages 206-214, Dec., 2019 [Bibtex]
  • D.T. Nguyen, V.B. Dang, and K. Gaj, A high-level synthesis approach to the software/hardware codesign of NTT-based post-quantum cryptography algorithms, 2019 International Conference on Field Programmable Technology, FPT 2019, Tianjin, China, pages 371-374, Dec., 2019 [Bibtex]
  • F. Farahmand, D.T. Nguyen, V.B. Dang, A. Ferozpuri, and K. Gaj, Software/hardware codesign of the post quantum cryptography algorithm NTRUEncrypt using high-level synthesis and register-transfer level design methodologies, 29th International Confererence on Field-Programmable Logic and Applications, FPL 2019, Barcelona, Spain, Sep., 2019 [Bibtex]
  • T. Winograd, R. Shahid, and K. Gaj, An automated scheduler-based approach for the development of cryptoprocessors for pairing-based cryptosystems, 26th Reconfigurable Architectures Workshop, RAW 2019, Rio de Janeiro, Brazil, May, 2019 [Bibtex]
  • F. Farahmand, V.B. Dang, D.T. Nguyen, and K. Gaj, Evaluating the potential for hardware acceleration of four NTRU-based Key Encapsulation Mechanisms using software/hardware codesign, 10th International Conference on Post-Quantum Cryptography, PQCrypto 2019, Chongqing, China, LNCS, Springer, May, 2019 [Bibtex]
  • W. Diehl, F. Farahmand, A. Abdulgadir, J.-P. Kaps, and K. Gaj, Face-off between the CAESAR lightweight finalists: ACORN vs. Ascon, Cryptology ePrint Archive, number 184, March, 2019 [Bibtex]
  • F. Farahmand, M.U. Sharif, K. Briggs, and K. Gaj, A high-speed constant-time hardware implementation of NTRUEncrypt SVES, International Conference on Field Programmable Technology, FPT 2018, Naha, Okinawa, Japan, December, 2018 [Bibtex]
  • W. Diehl, F. Farahmand, A. Abdulgadir, J.-P. Kaps, and K. Gaj, Face-off between the CAESAR lightweight finalists: ACORN vs. Ascon, International Conference on Field Programmable Technology, FPT 2018, Naha, Okinawa, Japan, December, 2018 [Bibtex]
  • A. Ferozpuri and K. Gaj, High-speed FPGA implementation of the NIST Round 1 Rainbow signature scheme, 2018 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2018, Cancun, Mexico, December, 2018 [Bibtex]
  • M. Tempelmeier, J.-P. Kaps, and G. Sigl, Experimental power and performance evaluation of CAESAR hardware finalists, 2018 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2018, Cancun, Mexico, December, 2018 [Bibtex]
  • G. Banegas, P.S.L.M. Barreto, B.O. Boidje, P.-L. Cayrel, G.N. Dione, K. Gaj, C.T. Gueye, R. Haeussler, J.B. Klamti, O. Ndiaye, D.T. Nguyen, and E. Persichetti, DAGS: Key encapsulation using Dyadic GS codes, Journal of Mathematical Cryptology, volume 12, number 4, pages 221–240, December, 2018 [Bibtex]
  • K. Gaj, Challenges and rewards of implementing and benchmarking Post-Quantum Cryptography in hardware, The 28th ACM Great Lakes Symposium on VLSI, GLSVLSI 2018, Chicago, IL, USA, ACM, May, 2018 [Bibtex]
  • F. Farahmand, W. Diehl, A. Abdulgadir, J.-P. Kaps, and K. Gaj, Improved lightweight implementations of CAESAR authenticated ciphers, The 26th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2018, Boulder, CO, USA, IEEE, pages 29–36, April, 2018 [Bibtex]
  • M. Tempelmeier, F. De, J.-P. Kaps, and G. Sigl, The CAESAR-api in the real world - towards a fair evaluation of hardware CAESAR candidates, IEEE International Symposium on Hardware Oriented Security and Trust (HOST), Washington, DC, Apr, 2018 [Bibtex]
  • W. Diehl, A. Abdulgadir, F. Farahmand, J.-P. Kaps, and K. Gaj, Comparison of cost of protection against differential power analysis of selected authenticated ciphers, IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2018, Washington, DC, April, 2018 [Bibtex]