Department of Electrical and Computer Engineering
George Mason University
Engineering Building 3100
4400 University Drive
Fairfax, VA 22030-4444
Voice: (703) 993-1569
Fax: (703) 993-1601
E-mail: ece@gmu.edu
Theses
A. Abdulgadir,
Secure hardware implementations of lightweight and post-quantum cryptography: Trade-offs, applicability, and tools,
George Mason University,
Fairfax, Virginia, USA,
May,
2021,
Ph.D. Dissertation [
Bibtex]
P.S.V.V.K. Yalla,
Methodology for developing lightweight architectures for FPGAs,
ECE Department, George Mason University,
Fairfax, Virginia, USA,
Dec,
2017,
Ph.D. Dissertation [
pdf] [
Bibtex]
A. Salman,
Public key cryptography using hardware/software co-design for the internet of things,
ECE Department, George Mason University,
Fairfax, Virginia, USA,
Aug,
2017,
Ph.D. Dissertation [
Bibtex]
S. Katamreddy,
Experimental testbed for electromagnetic analysis,
ECE Department, George Mason University,
Fairfax, Virginia, USA,
Dec,
2015,
Masters Thesis [
Bibtex]
J. Pham,
Development and benchmarking of cryptographic implementations on embedded platforms,
ECE Department, George Mason University,
Fairfax, Virginia, USA,
Aug,
2015,
Masters Thesis [
pdf] [
Bibtex]
Y. Ravishankar,
PUFs An extensive survey,
ECE Department, George Mason University,
Fairfax, Virginia, USA,
Jul,
2015,
Masters Thesis [
Bibtex]
R. Velegalati,
Developing an integrated environment for detecting and mitigating side-channel and fault attacks on hardware platforms,
ECE Department, George Mason University,
Fairfax, Virginia, USA,
Feb,
2015,
Ph.D. Dissertation [
Bibtex]
K. Shah,
An innovative approach to detect glitches in hardware implementations on FPGAs,
ECE Department, George Mason University,
Fairfax, Virginia, USA,
Feb,
2013,
Master's Thesis [
Bibtex]
S. Gurung,
SHA-3 finalist Keccak on FPGAs,
ECE Department, George Mason University,
Fairfax, Virginia, USA,
Apr,
2012,
Master's Thesis [
Bibtex]
S.C. Vadlamudi,
Compact implementations and benchmarking of two SHA-3 finalists BLAKE and JH on FPGAs,
ECE Department, George Mason University,
Fairfax, Virginia, USA,
Dec,
2011,
Master's Thesis [
Bibtex]
K.K. Surapathi,
Lightweight Implementations and Power Measurements of SHA-3 Candidates on FPGAs,
ECE Department, George Mason University,
Fairfax, Virginia, USA,
Dec,
2011,
Master's Thesis [
Bibtex]
A. Prabhakaran,
Side-channel analysis of block ciphers using CERG-GMU interface on SASEBO-GII,
ECE Department, George Mason University,
Fairfax, Virginia, USA,
May,
2011,
Master's Thesis [
pdf] [
Bibtex]
A. Salman,
IPSec implementation in embedded systems for partial reconfigurable platforms,
ECE Department, George Mason University,
Fairfax, Virginia, USA,
May,
2011,
Master's Thesis [
pdf] [
Bibtex]
S. Shah,
Investigation of DPA resistance of block RAMs in FPGAs,
ECE Department, George Mason University,
Fairfax, Virginia, USA,
May,
2010,
Master's Thesis [
pdf] [
Bibtex]
P.S.V.V.K. Yalla,
Differential power analysis on light weight implementations of block ciphers,
ECE Department, George Mason University,
Fairfax, Virginia, USA,
July,
2009,
Master's Thesis [
Bibtex]
R. Velegalati,
Securing light weight cryptographic implementations on FPGAs using dual rail with pre-charge logic,
ECE Department, George Mason University,
Fairfax, Virginia, USA,
July,
2009,
Master's Thesis [
Bibtex]
S.P. Karanam,
Tiny true random number generator,
ECE Department, George Mason University,
Fairfax, Virginia, USA,
May,
2009,
Master's Thesis [
Bibtex]