This is the archive of news previously and currently shown on our main page. Seminars are posted on the seminar page. Our latest publications are posted on the publications page.

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2016

Dr. Gaj attended Indocrypt 2016

Dr. Gaj attended the 17th International Conference on Cryptology in India, Indocrypt 2016, held in Kolkata, India, on December 11-14, 2016. He delivered a talk based on the paper "AEZ: Anything-but EaZy in Hardware," by Ekawat Homsirikamol and Kris Gaj. He also served as a substitute speaker for the talk based on the paper "Fast Hardware Architectures for Supersingular Isogeny Diffie-Hellman Key Exchange on FPGA," by Brian Koziel, Reza Azarderakhsh, and Mehran Mozaffari Kermani. (12/15/2016)


Dr. Gaj attended Asiacrypt 2016

Dr. Gaj attended the 22nd Annual International Conference on the Theory and Applications of Cryptology and Information Security, Asiacrypt 2016, held in Hanoi, Vietnam, on December 4-8, 2016. During this conference, he served as a chair for the session entitled "SCA and Leakage Resilience I". He also attended the 10th Intel's workshop on International View of the State-of-the-Art of Cryptography and Security and its Use in Practice, organized by Claire Vishik, and held at the same venue as Asiacrypt on December 10. (12/11/2016)


Ekawat "Ice" Homsirikamol attended ReConFig 2016

Ekawat "Ice" Homsirikamol represented CERG at the 2016 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2016, held in Cancun, Mexico, on November 30-December 2, 2016. He delivered a short talk and presented a poster entitled "A Zynq-based Testbed for the Experimental Benchmarking of Algorithms Competing in Cryptographic Contests," co-authored by Farnoud Farahmand, Ekawat Homsirikamol, and Kris Gaj. (12/03/2016)


Cédric Marchand defended his PhD Thesis

A former visitor at CERG and our affiliated scholar, Cédric Marchand defended his Ph.D. thesis at Jean Monnet University in Saint-Etienne, France, on November 24, 2016. His thesis was entitled "Conception de matériel salutaire pour lutter contre la contrefaçon et le vol de circuits intégrés" ("Designing Salutary Hardware to Combat Counterfeiting and Theft of Integrated Circuits"). The members of his Ph.D. Committee included Drs. Lilian Bossuet (Chair), Gildas Avoine, Viktor Fischer, Julien Francq, and Lionel Torres. (11/25/2016)


Sanjay Deshpande defended his MS Thesis

Sanjay Deshpande defended his MS Thesis, entitled "Analysis and Inner-Round Pipelined Implementation of Selected Parallelizable CAESAR Competition Candidates," on November 22, 2016. Members of his Committee included: Dr. Gaj (Chair), Dr. Kaps, and Dr. Chen. (2016/11/23)


William Diehl defended his PhD Thesis Proposal

William Diehl defended his PhD Thesis Proposal, entitled "Analysis of Side Channel Resistance and Evaluation of Countermeasures to Side Channel Attacks on Lightweight Authenticated Ciphers," on November 21, 2016. Members of his dissertation committee include Dr. Gaj (co-Chair), Dr. Kaps (co-Chair), Dr. Sasan, and Dr. Ammann. (2016/11/22)


Farnoud Farahmand defended his MS Thesis

Farnoud Farahmand defended his MS Thesis, entitled "Tools and Experimental Setup for Efficient Hardware Benchmarking of Candidates in Cryptographic Contests," on November 21, 2016. Members of his Committee included: Dr. Gaj (Chair), Dr. Kaps, and Dr. Sasan. In October, Farnoud was admitted to the ECE PhD Program at Mason and he will continue his research at CERG as a part of his PhD studies. (2016/11/22)


Ekawat "Ice" Homsirikamol defended his PhD Thesis

Ekawat "Ice" Homsirikamol defended his PhD Thesis, entitled "A New Approach to the Development of Cryptographic Standards Based on the Use of High-Level Synthesis Tools" on November 18, 2016. The members of his dissertation committee included Dr. Gaj (Chair), Dr. Kaps, Dr. Paris, and Dr. Stavrou. In October, "Ice" started his new assignment as a Lead Software Engineer at Cadence Design Systems Inc. in San Jose, CA, in the same group as our former student Marcin Rogawski.(2016/11/19)


Dr. Gaj gave a keynote address at CADICS 2016

Dr. Gaj gave a keynote address at the CADICS - Computer-Aided Design and Implementation for Cryptography and Security - workshop, co-located with the 2016 International Conference on Computer Aided Design - ICCAD, to be held in Austin, TX, on Nov. 7-10, 2016. Dr. Gaj's keynote, co-authored with Ekawat Homsirikamol, Farnoud Farahmand, Ahmed Ferozpuri, Marcin Rogawski, and Panasayya Yalla, is entitled "Computer-Aided Design Tools and Methodologies for Evaluating Candidates in Cryptographic Contests," and was held on Nov. 10. (2016/10/23)


Dr. Kaps attended SPEED-B

Dr. Kaps attended the SPEED-B - Software performance enhancement for encryption and decryption, and benchmarking conference held in Utrecht, The Netherlands, on October 19-21, 2016. As part of this conference he gave an invited talk on the eXtended eXternal Benchmarking eXtension (XXBX) a tool to benchmark performance of cryptographic algorithms on microcontrollers. More information on XXBX can be found on our XXBX Page. (10/25/16)


Dr. Gaj and Dr. Kaps attended DIAC 2016

Dr. Gaj and Dr. Kaps attended DIAC 2016, the Directions in Authenticated Ciphers workshop, held in Nagoya, Japan, on September 26-27, 2016. As a part of this workshop, Dr. Gaj gave a talk entitled "Toward Fair and Comprehensive Benchmarking of CAESAR Candidates in Hardware: Standard API, High-Speed Implementations in VHDL/Verilog, and Benchmarking Using FPGAs," co-authored with Ekawat Homsirikamol, William Diehl, Ahmed Ferozpuri, Farnoud Farahmand, Michael X. Lyons, and Panasayya Yalla, as well as the presentation entitled "An Alternative Approach to Hardware Benchmarking of CAESAR Candidates Based on the Use of High-Level Synthesis Tools," co-authored with Ekawat Homsirikamol. Dr. Kaps gave a talk entitled "Enhancing CAESAR Hardware API Support for Lightweight Architectures," co-authored with Panasayya Yalla. (09/28/2016)


Dr. Gaj is a member of the Program Committee of DATE 2017

Dr. Gaj is a member of the Program Committee of DATE 2017: Design, Automation and Test in Europe conference, in Track A: Application Design, Topic A5: Secure Systems. Multiple student members of CERG are contributing their time and expertise serving as sub-reviewers for the aforementioned conference. (09/20/2016)


Ekawat Homsirikamol gave a PhD Seminar

Ekawat Homsirikamol gave the PhD seminar entitled "From C to Hardware: Toward Using High-Level Synthesis for Hardware Benchmarking of Candidates in Cryptographic Contests," on September 9, 2016. His PhD defense is tentatively scheduled for November 18, 2016. (09/10/2016)


William Diehl attended DSD 2016

William Diehl attended the 19th Euromicro Conference on Digital System Design, DSD 2016, held in Limassol, Cyprus, August 31-September 2, 2016. As part of the conference, William presented the paper "RTL Implementations and FPGA Benchmarking of Three Authenticated Ciphers Competing in CAESAR Round Two" and gave a poster presentation "Implementation of a Boolean Masking Scheme for the SCREAM Cipher." (09/03/2016)


Dr. Gaj attended FPL 2016

Dr. Gaj attended the 26th International Conference on Field-Programmable Logic and Applications, FPL 2016, held in Lausanne, Switzerland, August 29-September 2, 2016. As part of this conference, Dr. Gaj gave a short talk and presented a poster, entitled "Hardware-Software Codesign of RSA for Optimal Performance vs. Flexibility Trade-off," based on the paper co-authored with Malik Umar Sharif, Rabia Shahid, and Marcin Rogawski. Additionally, Dr. Gaj attended the workshop FPGAs for Software Programmers, FSP 2016, and the tutorial Pynq for Zynq Devices, both co-located with FPL. (09/03/2016)


Presentation summarizing benchmarking of Round 2 CAESAR Candidates

The GMU Benchmarking Team has published and announced a comprehensive presentation, entitled "Benchmarking of Round 2 CAESAR Candidates in Hardware: Methodology, Designs & Results," made available at the CAESAR page of the ATHENa website. The GMU Team has contributed high-speed RTL implementations of AES-GCM and 19 CAESAR Candidates, including a total of 25 variant-architecture pairs, with multiple extensions and improvements published in the period from June 30 to August 11, 2016. (08/11/2016)


Bilal Habib defended his PhD Thesis

Bilal Habib defended his PhD Thesis, entitled "Design, Implementation and Analysis of Efficient FPGA based Physical Unclonable Functions," on July 26, 2016. The members of his dissertation committee included Dr. Gaj (co-Chair), Dr. Kaps (co-Chair), Dr. Homayoun, and Dr. Rangwala. In August, Bilal started his new assignment as a Postdoctoral Fellow at the Northern Arizona University in Flagstaff, Arizona, as a part of the research group of Prof. Bertrand Cambou. (08/10/2016)


Benchmarking of Round 2 CAESAR Candidates

The CERG Team announced the results of hardware benchmarking of Round 2 CAESAR Candidates on July 25, 2016. The benchmarking effort involved over 40 distinct submission packages covering 28 candidate families, submitted by 13 groups from all over the world. About 20 implementations have been developed by members of CERG. All implementations have been benchmarked using four high-performance FPGA families: Virtex 6, Virtex 7, Stratix IV, and Stratix V. Additionally, implementations of 10 lightweight algorithms have been benchmarked using four low-cost FPGA families: Spartan 6, Artix 7, Cyclone IV, and Cyclone V. The comprehensive rankings can be reviewed by accessing the ATHENa Database of Results. Additionally, two web-based tables, describing, respectively all submission packages and all variant-architecture pairs, are available at the ATHENa Website. Majority of the designs submitted for benchmarking are compliant with the CAESAR Hardware API, developed by members of CERG, and approved by the CAESAR Committee. (07/25/2016)


Dr. Gaj and Dr. Kaps attended CryptArchi 2016

Dr. Gaj and Dr. Kaps attended CryptArchi 2016, held in La Grande Motte near Montpellier, France, on June 21-24, 2016. Dr. Gaj gave a talk entitled "Fair and Comprehensive Benchmarking of 29 Round 2 CAESAR Candidates in Hardware: Preliminary Results," and Dr. Kaps delivered a presentation entitled "A Scalable ECC Processor Implementation for High-Speed and Lightweight". (06/25/2016)


Panasayya Yalla and Dr. Kaps gave hardware demo at HOST 2016

Panasayya Yalla and Dr. Kaps attended the IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2016, held in McLean, VA, on May 3-5, 2016. As a part of the symposium, they gave a hardware demo of the CERG Flexible, Opensource workbench for Side-channel analysis (FOBOS), designed by Rajesh Velegalati, Panasayya Yalla, and Dr. Kaps. (05/06/2016)


Dr. Viktor Fischer visited GMU

Dr. Viktor Fischer, a Professor at Jean Monnet University, Saint-Etienne, France, visited GMU on May 4, 2016, and gave the ECE Departmental seminar entitled "Sources of Randomness in Digital Devices and Their Testability". Dr. Fischer is a founder of the CryptArchi workshop series on cryptographic architectures embedded in logic devices, attended by CERG faculty and students regularly every year since the first edition of the workshop in January 2003. He is also a world-renowned expert in the area of true random number generation. His talk was followed by meetings with several GMU faculty members and CERG graduate students. (05/05/2016)


William Diehl gave a poster presentation at FCCM 2016

William Diehl attended the 24th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2016, held in Washington DC, on May 1-3, 2016. As a part of the symposium, William gave the poster presentation, entitled "High-Speed RTL Implementations and FPGA Benchmarking of Three Authenticated Ciphers Competing in CAESAR Round Two." (05/04/2016)


Ludovic Lescieux from ALPhANOV visited CERG

On April 29, 2016, CERG hosted Mr. Ludovic Lescieux from ALPhANOV - an optics and lasers technology center based in Talence, near Bordeaux in France. As a part of his visit, Mr. Lescieux gave the presentation and demo about the ALPhANOV equipment that can be used for fault attacks against integrated circuits. In particular, the presentation covered the Pulse-on-Demand Modules (PDM) and Multispot Laser Platform Control. (04/30/2016)


Dr. Bertrand Cambou visited GMU

Dr. Bertrand Cambou, from Northern Arizona University visited CERG on April 4, 2016, and gave the ECE Departmental seminar entitled "PUF designed with Resistive RAM and Ternary States". His talk was followed by individual meetings with several Computer Engineering faculty and CERG graduate students. (04/05/2016)


Bilal Habib attended ARC 2016

Bilal Habib attended the 12th International Symposium on Reconfigurable Computing, ARC 2016, held in Mangaratiba, Rio de Janeiro, Brazil, on 22-24 March, 2016. During this conference Bilal gave a talk entitled: "A Comprehensive Set of Schemes for PUF Response Generation". The scripts described in this presentation and sample raw data have been made available at the CERG PUF page. (03/25/2016)


Ahmed Ferozpuri and Dr. Gaj attended PQCrypto 2016

Ahmed Ferozpuri and Dr. Gaj attended the 7th International Conference on Post-Quantum Cryptography, PQCrypto 2016, preceded by the Post-Quantum Cryptography Winter School, held in Fukuoka, Japan, on February 22-26, 2016. During this conference, NIST announced its upcoming Call for Proposals regarding quantum-resistant cryptographic algorithms for new public-key cryptographic standards, to be published in Fall 2016. PQCrypto 2016 included the Hot Topic Session, during which Ahmed Ferozpuri gave a 5-minute presentation entitled "A Framework for Evaluating Software/Hardware Implementations of Post-Quantum Public-Key Algorithms Using Zynq SoC". (02/27/2016)