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2010
CERG Paper is Winner of the FPL Community Award
Dr. Gaj, Dr. Kaps, and their graduate students from the Cryptographic Engineering Research Group (CERG), Electrical and Computer Engineering, received the Field Programmable Logic (FPL) Community Best Paper Award at the 20th International Conference on Field Programmable Logic and Applications held in Milan, Italy, on Aug. 31st - Sep. 2nd, 2010. In the final round of the contest, their paper entitled "ATHENa – Automated Tool for Hardware EvaluatioN: Toward Fair and Comprehensive Benchmarking of Cryptographic Hardware using FPGAs" [Bibtex] competed against two other nominated papers submitted by two strong computer engineering groups from the University of Wisconsin-Madison, USA, and the ENS de Lyon, France. The paper and the benchmarking system, ATHENa, featured in the paper were developed as a part of the NIST-sponsored project entitled "Environment for Fair and Comprehensive Performance Evaluation of Cryptographic Hardware and Software". (9/29/10)
Dr. Gaj and Dr. Kaps awarded a NIST ARRA grant
Dr. Gaj and Dr. Kaps have been awarded a highly-competitive NIST ARRA (American Recovery and Reinvestment Act) grant for their research on benchmarking of cryptographic hardware and software. Their proposal, developed in Summer 2009, was one out of only 27 proposals selected for funding from among over 1300 grant applications submitted to the same program. These numbers amount to a 2% acceptance rate, which is unusually small, even for very competitive grant programs. The project, entitled "Environment for Fair and Comprehensive Performance Evaluation of Cryptographic Hardware and Software," is a joint work with Virginia Tech and University of Illinois at Chicago. The project period is from January 1, 2010 to December 31, 2012, and the total amount of the award is $1,496,655. Please click on this link for the complete NIST announcement. (01/08/10)