William Diehl
Contact
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3100 Engineering Building George Mason University ECE Department, CERG 4400 University Drive, MS 1G5 Fairfax, VA 22030 |
Office: Engineering Building, Room 3224 Phone (lab): 703-993-1561 E-Mail: wdiehl'at'gmu.edu |
Research Interest
Cryptography and digital design; Power analysis side channel attacks in FPGA and microcontrollers; Countermeasures to SCA; Efficient authenticated cipher implementations in hardware and software.
Advisor: Dr. Jens-Peter Kaps and Dr. Kris Gaj
Biography
William Diehl is a Doctoral Candidate in the Department of Electrical and Computer Engineering (ECE) at George Mason University. His interests include secure and efficient implementations of cryptography in hardware and software. His recent research topics include power analysis side channel attacks on lightweight authenticated ciphers, design and implementation of authenticated ciphers in Field Programmable Gate Arrays (FPGA), and implementation of lightweight cryptography in very low-cost, low-power reconfigurable microprocessors. William holds a B.A. degree in Computer Science from Duke University, and a M.S. degree in Electrical Engineering from the Naval Postgraduate School.
Publications
- W. Diehl, A. Abdulgadir, and J.-P. Kaps, Vulnerability analysis of a soft core processor through fine-grain power profiling, Jun, 2019, Cryptology ePrint Archive, Paper 2019/742 [Bibtex]
- J.-P. Kaps, W. Diehl, M. Tempelmeier, F. Farahmand, E. Homsirikamol, and K. Gaj, A comprehensive framework for fair and efficient benchmarking of hardware implementations of lightweight cryptography, Nov, 2019, Cryptology ePrint Archive, Paper 2019/1273 [Bibtex]
- L. Beckwith and W. Diehl, New directions for NewHope: Improving performance of post-quantum cryptography through algorithm-level pipelining, International Conference on Field-Programmable Technology, FPT 2020, IEEE, pages 120–128, Dec., 2020 [Bibtex]
- A. Abdulgadir, W. Diehl, and J.-P. Kaps, An open-source platform for evaluation of hardware implementations of lightweight authenticated ciphers, 2019 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2019, Cancun, Mexico, Dec., 2019 [Accepted Version, pdf] [Bibtex]
- W. Diehl, F. Farahmand, A. Abdulgadir, J.-P. Kaps, and K. Gaj, Face-off between the CAESAR lightweight finalists: ACORN vs. Ascon, Cryptology ePrint Archive, number 184, March, 2019 [Bibtex]
- W. Diehl, F. Farahmand, A. Abdulgadir, J.-P. Kaps, and K. Gaj, Face-off between the CAESAR lightweight finalists: ACORN vs. Ascon, International Conference on Field Programmable Technology, FPT 2018, Naha, Okinawa, Japan, December, 2018 [Bibtex]
- F. Farahmand, W. Diehl, A. Abdulgadir, J.-P. Kaps, and K. Gaj, Improved lightweight implementations of CAESAR authenticated ciphers, The 26th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2018, Boulder, CO, USA, IEEE, pages 29–36, April, 2018 [Bibtex]
- W. Diehl, A. Abdulgadir, J.-P. Kaps, and K. Gaj, Comparing the cost of protecting selected lightweight block ciphers against differential power analysis in low-cost FPGAs, Computers, volume 7, number 2, Apr, 2018 [Bibtex]
- W. Diehl, A. Abdulgadir, F. Farahmand, J.-P. Kaps, and K. Gaj, Comparison of cost of protection against differential power analysis of selected authenticated ciphers, IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2018, Washington, DC, April, 2018 [Bibtex]
- F. Farahmand, A. Ferozpuri, W. Diehl, and K. Gaj, Minerva: Automated hardware optimization tool, 2017 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2017, Cancun, Mexico, IEEE, Dec., 2017 [Bibtex]
- A. Salman, W. Diehl, and J.-P. Kaps, A light-weight hardware/software co-design for pairing-based cryptography with low power and energy consumption, International Conference on Field Programmable Technology (FPT 2017), Melbourne, Australia, Dec, 2017 [Bibtex]
- W. Diehl, A. Abdulgadir, J.-P. Kaps, and K. Gaj, Side-channel resistant soft core processor for lightweight block ciphers, International Conference on Reconfigurable Computing and FPGAs (ReConFig 2017), Cancun, Mexico, Dec, 2017 [Bibtex]
- W. Diehl, A. Abdulgadir, J.-P. Kaps, and K. Gaj, Comparing the cost of protecting selected lightweight block ciphers against differential power analysis in low-cost FPGAs, International Conference on Field Programmable Technology (FPT 2017), Melbourne, Australia, Dec, 2017 [Bibtex]
- W. Diehl, F. Farahmand, P. Yalla, J.-P. Kaps, and K. Gaj, Comparison of hardware and software implementations of selected lightweight block ciphers, 27th International Conference on Field Programmable Logic and Applications, FPL 2017, Ghent, Belgium, Sep., 2017 [Bibtex]
- W. Diehl and K. Gaj, RTL implementations and FPGA benchmarking of selected CAESAR round two authenticated ciphers, Microprocessors and Microsystems, volume 52, pages 202-218, July, 2017 [Bibtex]
- W. Diehl and K. Gaj, Implementation of a Boolean masking scheme for the SCREAM cipher, 19th Euromicro Conference on Digital Systems Design, DSD 2016, Limassol, Cyprus, Aug. 31-Sep. 2, 2016 [Bibtex]
- W. Diehl and K. Gaj, RTL implementations and FPGA benchmarking of three authenticated ciphers competing in CAESAR round two, 19th Euromicro Conference on Digital System Design - DSD 2016, Limassol, Cyprus, Aug. 31-Sep. 2, 2016 [Bibtex]
- E. Homsirikamol, W. Diehl, A. Ferozpuri, F. Farahmand, M.U. Sharif, and K. Gaj, A universal hardware API for authenticated ciphers, Proc. 2015 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2015, IEEE, Dec, 2015 [Bibtex]