"The Greek goddess Athena was frequently called upon to settle disputes between the gods or various mortals. Athena Goddess of Wisdom was known for her superb logic and intellect. Her decisions were usually well-considered, highly ethical, and seldom motivated by self-interest."
ATHENa: Automated Tool for
EvaluatioN is a project started at George Mason
aimed at fair, comprehensive, and automated evaluation of
cores developed using hardware description languages, such as VHDL
Our project has been inspired by a similar environment for comparing software implementations of cryptography, developed by Daniel Bernstein and Tanja Lange, called eBACS (ECRYPT Benchmarking of Cryptographic Systems).
Our environment is based on a comprehensive set of scripts, which can be downloaded freely from the project web site and run on computers belonging to the authors of HDL codes.
The system allows the comparison of
- Cryptographic algorithms, e.g. candidates in the SHA-3 contest
- Cryptographic architectures and implementations, e.g., basic iterative vs. unrolled, GMU implementation vs. Bochum implementation
- Hardware platforms, e.g. Xilinx Virtex 6 vs. Altera Stratix IV
- Languages and tools, e.g., VHDL vs. Verilog, Xilinx ISE
12.1 vs. Xilinx ISE v. 11.1.
The main features of our environment in version 1.0 will include:
- running all steps of synthesis, implementation, and timing analysis in batch mode
- support for devices and tools of the following three major FPGA vendors: Xilinx, Altera, Actel
- generation of results for multiple FPGA families of a given
e.g. Xilinx: Spartan 3, Virtex 5; Altera: Cyclone III, Aria II, Stratix IV; Actel: Igloo, Fusion, ProAsic3
- automated choice of a device within a given family of FPGAs assuming that the resource utilization does not exceed a certain limit, e.g. 80% of CLB slices or 50% of BRAMs
- automated optimization of results aimed at one of the three optimization criteria: speed, area, and ratio speed to area
- automated verification of the design through functional,
post-synthesis, and timing simulation, run in batch mode.
At this point, the system is still in its relatively early stages of development. Only a prototype, alpha version 0.6.2 is available at the moment.
Subsequent features will be added gradually, as the project progresses. The speed of the project development will depend on the future availability of human resources, funds, and contributions by volunteers interested in co-developing the system.
This project is currently supported through the NIST/ARRA grant no. 60NANB10D004.
Our paper describing ATHENa has received the Field Programmable Logic (FPL) Community Best Paper Award at the 20th International Conference on Field Programmable Logic and Applications, FPL 2010, held in Milan, Italy, on Aug. 31st - Sep. 2nd, 2010.
Image of Athena
courtesy of Carolyn Angus.