Kowsyap Pranay Kumar Musumuri

Contact

3100 Engineering Building
George Mason University
ECE Department, CERG
4400 University Drive, MS 1G5
Fairfax, VA 22030
E-Mail: kmusumur@gmu.edu
Curriculum Vitae: PDF
Linkedin: www.linkedin.com/in/kowsyap-pranay
Personal Homepage: www.kowsyappranay.site

Research Interest

  • FPGA and ASIC Hardware Design
  • Computer Architecture
  • Design Verification
  • Cryptography
  • Post-Quantum Cryptography
  • Neural Networks
  • Hardware Accelerators

    • Advisor: Dr. Kris Gaj

    Biography

    Kowsyap completed his Bachelor of Technology (B.Tech) in Electronics Engineering from the Indian Institute of Information Technology (IIIT) in 2017. He has several years of professional experience, having worked as a Software Engineer at MSR Cosmos LLC and a Power Programmer at Infosys, where he focused on optimization, and full-stack solutions. He also interned at SION Semiconductors Pvt. Ltd., gaining hands-on experience in SoC design and verification.He joined George Mason University (GMU) in Fall 2024 to pursue a Master of Science (M.S.) in Computer Engineering with a focus on VLSI design, digital system design, and cryptography. He became affiliated with the CERG in Summer 2025 as a Research Assistant. Currently, he is working as a Teaching Assistant, and is conducting thesis research on post-quantum cryptography (PQC) and its hardware implementation.

    Publications

    • K. Musumuri and M. A. Basiri M, Correctness of Synthesis for Tree based Decomposed Algorithm in Semiconductor Memory Designs with Larger Decoders, 5th Conference on Information and Communication Technology (CICT), Kurnool, India, January 2021.