Hardware/Software Codesign


  • A. Salman, M. Rogawski, and J.-P. Kaps, Efficient hardware accelerator for IPSEC based on partial reconfiguration on Xilinx FPGAs, International Conference on ReConFigurable Computing and FPGAs – ReConFig`11, IEEE, pages 242–248, Dec, 2011 [pre-print, pdf] [Bibtex]


  • A. Salman, IPSec implementation in embedded systems for partial reconfigurable platforms, ECE Department, George Mason University, Fairfax, Virginia, USA, May, 2011, Master's Thesis [pdf] [Bibtex]