Rajesh Velegalati

Contact

3100 Engineering Building
George Mason University
ECE Department, CERG
4400 University Drive, MS 1G5
Fairfax, VA 22030
 Office: Engineering Building , Room 3224
Phone (lab): 703-993-1561
E-Mail: rvelegal'at'gmu.edu
PGP Key ID: EAB8 3144 D165 C502

Research Interest

  • Side Channel Analysis
  • Protection agianst side channel attacks
  • Tamper sensing circuits
  • Dynamic Reconfiguration
  • Theoretical aspects of SCA
  • Ultra Low Power Cryptographic Implementation
  • Devoloping Back end tools for FPGAs

Advisor: Dr. Jens-Peter Kaps

Biography

Rajesh received his Master Degree from George Mason University in Summer 2009 and received his Bachelor Degree from Sir C.R.Reddy College on Engineering, Andhra University, India in 2006. He started his Phd program in George Mason University in Fall 2009. He is a research assistant under Dr. Jens-Peter Kaps as a part of CERG.

Publications

  • R. Velegalati and J.-P. Kaps, DPA resistance for light-weight implementations of cryptographic algorithms on FPGAs, Field Programmable Logic and Applications, FPL 2009, IEEE, pages 385–390, Aug, 2009 [Bibtex]