Panasayya Yalla
Contact
|
George Mason University ECE Department, CERG 4400 University Drive, MS 1G5 Fairfax, VA 22030 |
Office: Engineering Building, Room 3231 Phone (lab): 703-993-1609 E-Mail: pyalla'at'gmu.edu PGP Key ID: 0xD9190217 |
Research Interest
Differential power analysis attacks and efficient hardware implementaion of arthimetic circuits and cryptographic algorithms.
Advisor: Dr. Jens-Peter Kaps
Biography
Panasayya is a Teaching Assistant in the Electrical and Computer Engineering Department at GMU. He is working toward his M.S. degree in Computer Engineering as part of CERG. He received his B.S. degree from Sir C.R.Reddy college on Engineering, Eluru, India in 2006.
Publications
- J.-P. Kaps, P. Yalla, K.K. Surapathi, B. Habib, S. Vadlamudi, S. Gurung, and J. Pham, Lightweight implementations of SHA-3 candidates on FPGAs, Progress in Cryptology INDOCRYPT 2011, Lecture Notes in Computer Science (LNCS), volume 7107, Springer Berlin / Heidelberg, pages 270289, Dec, 2011 [Bibtex]
- P. Yalla and J.-P. Kaps, Lightweight cryptography for FPGAs, International Conference on ReConFigurable Computing and FPGAs ReConFig'09, IEEE, pages 225230, Dec., 2009 [pre-print, pdf] [Bibtex]
- P. Yalla and J.-P. Kaps, Compact FPGA implementation of Camellia, Field Programmable Logic and Applications, FPL 2009, IEEE, pages 658661, Aug., 2009 [pre-print, pdf] [Bibtex]
- P.S.V.V.K. Yalla, Differential power analysis on light weight implementations of block ciphers, ECE Department, George Mason University, Fairfax, Virginia, USA, July, 2009, Masters Thesis [Bibtex]