SCA

R. Velegalati and J.-P. Kaps, Introducing FOBOS: Flexible Open-source BOard for Side-channel analysis, May, 2012, Work in Progress (WiP), Third International Workshop on Constructive Side-Channel Analysis and Secure Design, COSADE 2012 [pdf] [Bibtex]
R. Velegalati and J.-P. Kaps, Improving security of SDDL designs through interleaved placement on Xilinx FPGAs, Field Programmable Logic and Applications, FPL 2011, IEEE, pages 506–511, Sep, 2011 [pre-print, pdf] [Bibtex]
S. Shah, R. Velegalati, J.-P. Kaps, and D. Hwang, Investigation of DPA resistance of Block RAMs in cryptographic implementations on FPGAs, International Conference on ReConFigurable Computing and FPGAs – ReConFig'10, IEEE, pages 274–279, Dec, 2010 [pre-print, pdf] [Bibtex]
R. Velegalati and J.-P. Kaps, Techniques to enable the use of block RAMs on FPGAs with dynamic and differential logic, International Conference on Electronics, Circuits, and Systems, ICECS 2010, IEEE, pages 1251–1254, Dec, 2010 [pre-print, pdf] [Bibtex]
J.-P. Kaps and R. Velegalati, DPA resistant AES on FPGA using partial DDL, IEEE Symposium on Field-Programmable Custom Computing Machines – FCCM 2010, IEEE, pages 273–280, May, 2010 [pre-print, pdf] [Bibtex]
R. Velegalati and J.-P. Kaps, DPA resistance for light-weight implementations of cryptographic algorithms on FPGAs, Field Programmable Logic and Applications, FPL 2009, IEEE, pages 385–390, Aug, 2009 [, pdf] [Bibtex]

A. Prabhakaran, Side-channel analysis of block ciphers using CERG-GMU interface on SASEBO-GII, ECE Department, George Mason University, Fairfax, Virginia, USA, May, 2011, Master's Thesis [pdf] [Bibtex]
S. Shah, Investigation of DPA resistance of block RAMs in FPGAs, ECE Department, George Mason University, Fairfax, Virginia, USA, May, 2010, Master's Thesis [pdf] [Bibtex]
R. Velegalati, Securing light weight cryptographic implementations on FPGAs using dual rail with pre-charge logic, ECE Department, George Mason University, Fairfax, Virginia, USA, July, 2009, Master's Thesis [Bibtex]
P.S.V.V.K. Yalla, Differential power analysis on light weight implementations of block ciphers, ECE Department, George Mason University, Fairfax, Virginia, USA, July, 2009, Master's Thesis [Bibtex]

R. Velegalati and P. Yalla, Differential power analysis attack on FPGA implementation of AES, George Mason University - ECE Department, May, 2008 [pdf] [Bibtex]