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Commit fd904f4d by farnoud
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new function for updating the frequency and updated paths in C codes to support… 

new function for updating the frequency and updated paths in C codes to support the new file grouping
parent 914c9dd3
Showing with 107 additions and 89 deletions
c_baremetal/NTRUEncrypt.c
......@@ -14,11 +14,11 @@
#include <string.h>
#include <stdlib.h>
#include <stdio.h>
#include "param.h"
#include "poly.h"
#include "./Original/param.h"
#include "./Original/poly.h"
#include "poly_rot.h"
#include "fastrandombytes.h"
#include "crypto_hash_sha512.h"
#include "./Original/fastrandombytes.h"
#include "./Original/crypto_hash_sha512.h"
#include "xtime_l.h"
#include "DMA_Transfer_def.c"
......@@ -406,7 +406,10 @@ encrypt_cca(
/* compute r*h */
/* SW/HW codesign Start */
if (HW_MULT){
/* This part is related to SW/HW co-design and take care of data
transfer to hardware for using the hardware accelerator */
convert_to_pos(r, r_pos, param);
u32 tx_rx_c;
u64 complement = 0x000000000000FFFF;
......@@ -431,7 +434,7 @@ encrypt_cca(
#if INIT_TIME
XTmrCtr_Stop(&TMRInst, 0);
execution_time = XTmrCtr_GetValue(&TMRInst, 0); // Read Timer value
execution_time = XTmrCtr_GetValue(&TMRInst, 0);
xil_printf("\r\n DMA total init enc = %d \r\n", execution_time);
#endif
......@@ -482,12 +485,12 @@ encrypt_cca(
#if POLY_MUL_EXE
XTmrCtr_Stop(&TMRInst, 0);
execution_time = XTmrCtr_GetValue(&TMRInst, 0); // Read Timer value
execution_time = XTmrCtr_GetValue(&TMRInst, 0);
xil_printf("\r\n Encrypt Mult Execution Time (ENC) = %d \r\n", execution_time);
#endif
#endif
}
/* SW/HW codesign End */
for (i=0;i<param->N;i++)
......@@ -544,11 +547,15 @@ int decrypt_cca(
f[0]++;
/* compute e = c * f */
/* SW/HW codesign Start */
dma_t* TxBuffer;
dma_t* RxBuffer;
u32 tx_rx_c;
u64 complement = 0x000000000000FFFF;
if (HW_MULT){
/* This part is related to SW/HW co-design and take care of data
transfer to hardware for using the hardware accelerator */
convert_to_pos(F, F_pos, param);
//u32 tx_rx_c;
//u64 complement = 0x000000000000FFFF;
......@@ -569,12 +576,11 @@ int decrypt_cca(
#if INIT_TIME
XTmrCtr_Stop(&TMRInst, 0);
execution_time = XTmrCtr_GetValue(&TMRInst, 0); // Read Timer value
execution_time = XTmrCtr_GetValue(&TMRInst, 0);
xil_printf("\r\n DMA total init dec 1= %d \r\n", execution_time);
#endif
TxBuffer[0]= 0x0000000000008400;
//memcpy(TxBuffer+1, h, 443*2);
for(tx_rx_c =1; tx_rx_c < 495; tx_rx_c ++) {
TxBuffer[tx_rx_c] = complement & F_pos[tx_rx_c -1];
}
......@@ -596,7 +602,7 @@ int decrypt_cca(
#if POLY_MUL_EXE
XTmrCtr_Stop(&TMRInst, 0);
execution_time = XTmrCtr_GetValue(&TMRInst, 0); // Read Timer value
execution_time = XTmrCtr_GetValue(&TMRInst, 0);
xil_printf("\r\n Decrypt Mult Execution Time (DEC1) = %d \r\n", execution_time);
#endif
......@@ -617,11 +623,12 @@ int decrypt_cca(
#if POLY_MUL_EXE
XTmrCtr_Stop(&TMRInst, 0);
execution_time = XTmrCtr_GetValue(&TMRInst, 0); // Read Timer value
execution_time = XTmrCtr_GetValue(&TMRInst, 0);
xil_printf("\r\n Decrypt Mult Execution Time (DEC1) = %d \r\n", execution_time);
#endif
#endif
}
/* SW/HW codesign End */
/* recover m = e mod p */
lift_msg(m, param);
......@@ -648,9 +655,11 @@ int decrypt_cca(
/* check if recovered r is correct */
/* SW/HW codesign Start */
if (HW_MULT){
/* This part is related to SW/HW co-design and take care of data
transfer to hardware for using the hardware accelerator */
convert_to_pos(r, r_pos, param);
ARRAY_LENGTH_TX = 495;
ARRAY_LENGTH_RX = 744;
TxBuffer = malloc(sizeof(dma_t)*ARRAY_LENGTH_TX);
......@@ -666,7 +675,7 @@ int decrypt_cca(
#if INIT_TIME
XTmrCtr_Stop(&TMRInst, 0);
execution_time = XTmrCtr_GetValue(&TMRInst, 0); // Read Timer value
execution_time = XTmrCtr_GetValue(&TMRInst, 0);
xil_printf("\r\n DMA total init dec 2= %d \r\n", execution_time);
#endif
......@@ -688,7 +697,6 @@ int decrypt_cca(
#if POLY_MUL_EXE
XTmrCtr_Stop(&TMRInst, 0);
// Read Timer value
execution_time = XTmrCtr_GetValue(&TMRInst, 0);
xil_printf("\r\n Decrypt Mult Execution Time (DEC2) = %d \r\n", execution_time);
#endif
......@@ -715,6 +723,7 @@ int decrypt_cca(
#endif
#endif
}
/* SW/HW codesign End */
#if DEBUG_1
display(t_rec, param->padN, "t_rec");
......
c_baremetal/NTRUEncrypt.h
......@@ -8,8 +8,8 @@
#ifndef NTRUENCRYPT_H_
#define NTRUENCRYPT_H_
#include "param.h"
#include "poly.h"
#include "./Original/param.h"
#include "./Original/poly.h"
/*
......
c_baremetal/Original/encrypt.c
......@@ -17,12 +17,12 @@
#include <string.h>
#include <stdio.h>
#include "api.h"
#include "NTRUEncrypt.h"
#include "../NTRUEncrypt.h"
#include "packing.h"
#include "crypto_hash_sha512.h"
#include "DMA_Transfer_def.c"
#include "DMA_Transfer_def.h"
#include "../DMA_Transfer_def.c"
#include "../DMA_Transfer_def.h"
/* key gen */
......@@ -83,17 +83,17 @@ int crypto_encrypt(
printf("unsupported parameter sets\n");
return -1;
}
/* set up the memory */
mem = malloc(sizeof(uint16_t)*param->padN*2);
buf = malloc(sizeof(uint16_t)*param->padN*6);
if(!mem || !buf)
{
printf("malloc error\n");
return -1;
}
memset(mem,0, sizeof(uint16_t)*param->padN*2);
memset(buf,0, sizeof(uint16_t)*param->padN*6);
h = mem;
......@@ -167,4 +167,3 @@ int crypto_encrypt_open(
return 0;
}
c_baremetal/Original/fastrandombytes.c
......@@ -23,7 +23,7 @@
#include <stdint.h>
#include "crypto_stream_salsa20.h"
#include "rng.h"
#include "../rng.h"
#include "shred.h"
#define RAND_LEN_BYTES (4096)
......@@ -115,4 +115,3 @@ rng_uint64(uint64_t *r)
return;
}
c_baremetal/Original/poly.c
......@@ -19,7 +19,7 @@
#include "poly.h"
#include "fastrandombytes.h"
#include "crypto_hash_sha512.h"
#include "poly_rot.h"
#include "../poly_rot.h"
#define PAD(N) ((N + 0x000f) & 0xfff0)
......
c_baremetal/README
......@@ -26,6 +26,7 @@ List of source code and their description:
platforms.
./clk_wiz_driver.h
./clk_wiz_driver.c
The driver for communicating with Clocking Wizard IP in the FPGA through
AXI Lite interface and changing the frequency of hardware accelerator during
run-time.
......@@ -45,10 +46,11 @@ List of source code and their description:
./AES/aes.h
./AES/aes.c
Standalone AES implementation.
./rng.h
./rng.c
Modified to use standalone AES implementation instead of AES implementation in OpenSSL
Modified to use standalone AES implementation instead of AES implementation
in OpenSSL.
./Original/api.h
./Original/encrypt.c
......@@ -66,6 +68,4 @@ List of source code and their description:
./Original/shred.c
./Original/crypto_stream_salsa20.h
./Original/crypto_stream.c
Original files from NIST PQC Round 1 submission NTRUEncrypt.
Original files from NIST PQC Round 1 submission NTRUEncrypt.
c_baremetal/clk_wiz_driver.c 0 → 100755
// =============================================================================
// Copyright © 2017-2018 by Cryptographic Engineering Research Group (CERG),
// ECE Department, George Mason University
// Fairfax, VA, U.S.A.
// Author: Farnoud Farahmand
// =============================================================================
#include "clk_wiz_driver.h"
#include "DMA_Transfer_def.h"
void UpdateFrequency (float accel_freq){
clk_wiz_status = 0;
clk_wiz_VCO_conf = 0x00000A01;
clk_wiz_CLK0_conf = 0x00000002;
clk_conf_tmp = (float)1000/accel_freq;
int_part = clk_conf_tmp;
float_part = (clk_conf_tmp - int_part)*1000;
if (float_part == 0){
clk_conf_tmp_int |= int_part;
}
else{
clk_conf_tmp_int |= int_part;
clk_conf_tmp_int |= 0x00040000;
clk_conf_tmp_int |= (float_part << 8);
}
clk_wiz_CLK0_conf = clk_conf_tmp_int;
clk_wiz_mWriteReg(CLK_WIZ_BASE_ADDR, clk_wiz_S_AXI_clk_Conf_Reg0_OFFSET, clk_wiz_VCO_conf);
clk_wiz_mWriteReg(CLK_WIZ_BASE_ADDR, clk_wiz_S_AXI_clk_Conf_Reg2_OFFSET, clk_wiz_CLK0_conf);
do {
clk_wiz_status = clk_wiz_mReadReg(CLK_WIZ_BASE_ADDR, clk_wiz_S_AXI_SLV_Status_Reg_OFFSET);
} while (clk_wiz_status != 0x1);
xil_printf("Clock configuration phase-1 done \r\n");
clk_wiz_mWriteReg(CLK_WIZ_BASE_ADDR, clk_wiz_S_AXI_clk_Conf_Reg23_OFFSET, 0x7);
clk_wiz_mWriteReg(CLK_WIZ_BASE_ADDR, clk_wiz_S_AXI_clk_Conf_Reg23_OFFSET, 0x2);
xil_printf("Clock configuration phase-2 done \r\n");
clk_wiz_status=0;
do {
clk_wiz_status = clk_wiz_mReadReg(CLK_WIZ_BASE_ADDR, clk_wiz_S_AXI_SLV_Status_Reg_OFFSET);
} while (clk_wiz_status != 0x1);
xil_printf("Clock configuration phase-3 done \r\n\r\n");
}
c_baremetal/clk_wiz_driver.h
......@@ -42,3 +42,5 @@
#define clk_wiz_mReadReg(BaseAddress, RegOffset) \
Xil_In32((BaseAddress) + (RegOffset))
void UpdateFrequency (float accel_freq);
c_baremetal/main.c
......@@ -10,7 +10,7 @@
#include <string.h>
#include <ctype.h>
#include "rng.h"
#include "api.h"
#include "./Original/api.h"
#include <time.h>
#include <stdio.h>
#include "xil_printf.h"
......@@ -68,46 +68,9 @@ int main()
/*************************** Initialize Clock Wizard **************************/
/* Clocking Wizard Configuration (uncomment this part to update the clock
frequency during the runtime) */
/*
// Requested frequency for hardware accelerator
accel_freq = 200;
clk_wiz_status = 0;
clk_wiz_VCO_conf = 0x00000A01;
clk_wiz_CLK0_conf = 0x00000002;
clk_conf_tmp = (float)1000/accel_freq;
int_part = clk_conf_tmp;
float_part = (clk_conf_tmp - int_part)*1000;
if (float_part == 0){
clk_conf_tmp_int |= int_part;
}
else{
clk_conf_tmp_int |= int_part;
clk_conf_tmp_int |= 0x00040000;
clk_conf_tmp_int |= (float_part << 8);
}
clk_wiz_CLK0_conf = clk_conf_tmp_int;
clk_wiz_mWriteReg(CLK_WIZ_BASE_ADDR, clk_wiz_S_AXI_clk_Conf_Reg0_OFFSET, clk_wiz_VCO_conf);
clk_wiz_mWriteReg(CLK_WIZ_BASE_ADDR, clk_wiz_S_AXI_clk_Conf_Reg2_OFFSET, clk_wiz_CLK0_conf);
do {
clk_wiz_status = clk_wiz_mReadReg(CLK_WIZ_BASE_ADDR, clk_wiz_S_AXI_SLV_Status_Reg_OFFSET);
} while (clk_wiz_status != 0x1);
xil_printf("Clock configuration phase-1 done \r\n");
clk_wiz_mWriteReg(CLK_WIZ_BASE_ADDR, clk_wiz_S_AXI_clk_Conf_Reg23_OFFSET, 0x7);
clk_wiz_mWriteReg(CLK_WIZ_BASE_ADDR, clk_wiz_S_AXI_clk_Conf_Reg23_OFFSET, 0x2);
xil_printf("Clock configuration phase-2 done \r\n");
clk_wiz_status=0;
do {
clk_wiz_status = clk_wiz_mReadReg(CLK_WIZ_BASE_ADDR, clk_wiz_S_AXI_SLV_Status_Reg_OFFSET);
} while (clk_wiz_status != 0x1);
xil_printf("Clock configuration phase-3 done \r\n\r\n");
*/
/* Request 100MHz frequency for hardware accelerator */
// UpdateFrequency(100);
/********************* Hardware Modules Configuration *************************/
Config = XAxiDma_LookupConfig(DMA_DEV_ID);
......
c_baremetal/poly_rot.c
#include "crypto_hash_sha512.h"
#include "fastrandombytes.h"
#include "param.h"
#include "./Original/crypto_hash_sha512.h"
#include "./Original/fastrandombytes.h"
#include "./Original/param.h"
#include "poly_rot.h"
#include <stdint.h>
#include <stdlib.h>
......@@ -23,8 +23,8 @@ void convert_to_pos(
uint16_t* r_pos, /* in - pointer represent the position of 1s and -1s in array r */
PARAM_SET const* param)
{
// The no. +1 and -1 aren't equal in some case.
// Modify the code to work on any case.
// The no. +1 and -1 aren't equal in some case.
// Modify the code to work on any case.
uint16_t i, j, k;
j = 0;
......@@ -40,13 +40,13 @@ void convert_to_pos(
k++;
}
}
#if DEBUG
printf("no. of +1, -1 in r: %d \n", j);
display(r, param->N, "r");
display(r_pos, k+5, "r_pos");
#endif
}
......@@ -123,12 +123,12 @@ void ntru_ring_mult_rotation(
// DONE
}
else if (mode == DECRYPT_MODE) {
// Decryption (1 + 3*apos)* b = b + 3*apos*b = b + apos*b << 1 + apos*b
// 1st. sum = apos*b
// 2nd. sum = sum + sum << 1
// 3rd. sum = sum + b
// Decryption (1 + 3*apos)* b = b + 3*apos*b = b + apos*b << 1 + apos*b
// 1st. sum = apos*b
// 2nd. sum = sum + sum << 1
// 3rd. sum = sum + b
/* t[(i+k)%N] = sum i=0 through N-1 of a[i], for b[k] = -1 */
for (j = param->d; j < total_p1_m1; j++)
......@@ -169,12 +169,12 @@ void ntru_ring_mult_rotation(
c[k] = c[k] + b[i];
}
}
// sum = F*e
// sum = F*e
for (k = 0; k < param->N; k++){
c[k] = c[k] + (c[k] << 1); // sum = sum*3 = 3*F*e
c[k] = c[k] + b[k]; // sum = sum + e = 3*F*e + e
c[k] = c[k] + (c[k] << 1); // sum = sum*3 = 3*F*e
c[k] = c[k] + b[k]; // sum = sum + e = 3*F*e + e
}
}
......
c_baremetal/poly_rot.h
......@@ -2,7 +2,7 @@
#ifndef POLY_ROT_H_
#define POLY_ROT_H_
#include "param.h"
#include "./Original/param.h"
#include "stddef.h"
#include <stdint.h>
......
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