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Commit 39e28dc7 by Farnoud Farahmand
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pre final version. hardware results are not verified

parent 8360d784
Showing with 115 additions and 68 deletions
README
......@@ -6,25 +6,39 @@ Author: Farnoud Farahmand
================================================================================
To create a new Vivado project for Software/Hardware co-design platform follow
the following steps:
Note: this instruction is tested for Vivado version 2018.2 and may not work for
other versions.
1. Go to the script directory and run "run_vivado.sh" bash script.
This script runs Vivado in batch mode, creates a project and generates the
Bitstream.
Note: if you would like to see the whole process in the gui mode, you should
uncomment the "start_gui" command in the first line of generate_bitstream.tcl
and remove "-mode batch" in "run_vivado.sh" bash script.
1. Go to the script directory and run "bash ./run_vivado.sh BOARD_NAME MODE"
command.
Available options for "BOARD_NAME" arguments are: ZCU104 (default), ZCU102
Available options for "MODE" argument are: BATCH (default), GUI
Here is an example to run the script for ZCU102 board in GUI mode:
$bash ./run_vivado.sh ZCU102 GUI
This script start Vivado, creates a project and generates the bitstream.
If you would like to see the whole process in graphical interface, use the GUI
mode.
2. When the bitstream generated successfully The Xilinx SDK application should
will opened automatically. In SDK application follow the following steps:
1- go to File -> New -> Application Project
2- in "Project name" enter your desired name and select "Next >"
3- select Empty Application in "Available Templates:" and select "Finish"
4- right click on your project name in "Project Explorer" tab and select
"Generate Linker Script"
5- Increase "Heap Size:" and "Stack Size:" to 10 MB
6- copy all C codes available in c_baremetal directory into the "src"
1- Create new application project: go to File -> New -> Application Project.
in "Project name" enter your desired name and select "Next >". select Empty Application in "Available Templates:" and select "Finish".
2- right click on your project name in "Project Explorer" tab and select
"Generate Linker Script".Increase "Heap Size:" and "Stack Size:" to 10 MB.
3- copy all C codes available in c_baremetal directory into the "src"
directory of your project
7- build your project and then right click on your project name and select
4- Turn on compiler optimization: right click on your project name in
"Project Explorer" tab and select "C/C++ Build Settings". In the opened
window select "Optimization" and change the Optimization Level to
"Optimize most (-O3)"
5- Program FPGA board: connect the FPGA board to your machine and in the SDK
click on Program FPGA icon and select Program
6- build your project and then right click on your project name and select
Run As -> 1 Launch on Hardware (System Debugger)
Note: To see the output of print functions on Windows machine you can use
SDK Terminal. But, on Linux machines you should use a 3rd party application
......
c_baremetal/DMA_Transfer_def.c
#include "DMA_Transfer_def.h"
/*****************************************************************************/
/*
*
......@@ -29,7 +28,6 @@ static void TxIntrHandler(void *Callback)
/* Acknowledge pending interrupts */
XAxiDma_IntrAckIrq(AxiDmaInst, IrqStatus, XAXIDMA_DMA_TO_DEVICE);
/*
......@@ -145,7 +143,6 @@ static void RxIntrHandler(void *Callback)
RxDone = 1;
}
}
......@@ -308,18 +305,6 @@ static int DMA_Transfer(dma_t *TxBuffer, u32 ARRAY_LENGTH_TX_in, dma_t *RxBuffer
int Status;
int move_c;
// dma_t TxBuffer_Loc[ARRAY_LENGTH_TX_in];
// dma_t RxBuffer_Loc[ARRAY_LENGTH_RX_in];
//
// for(move_c =0; move_c < ARRAY_LENGTH_RX; move_c ++) {
// RxBuffer_Loc[move_c] = RxBuffer[move_c];
// }
//
// for(move_c =0; move_c < ARRAY_LENGTH_TX; move_c ++) {
// TxBuffer_Loc[move_c] = TxBuffer[move_c];
// }
u32 BYTES_TO_TRANSFER_TX_in = ARRAY_LENGTH_TX_in*(sizeof(dma_t));
u32 BYTES_TO_TRANSFER_RX_in = ARRAY_LENGTH_RX_in*(sizeof(dma_t));
......@@ -369,17 +354,8 @@ static int DMA_Transfer(dma_t *TxBuffer, u32 ARRAY_LENGTH_TX_in, dma_t *RxBuffer
return XST_FAILURE;
}
//XTmrCtr_Stop(&TMRInst, 0);
//XTmrCtr_Reset(&TMRInst, 0);
//XTmrCtr_Start(&TMRInst, 0);
/* Wait RX done */
while (RxDone == 0) { /* xil_printf("Wait for intrupt \r\n"); NOP */ }
// for(move_c =0; move_c < ARRAY_LENGTH_RX; move_c ++) {
// RxBuffer[move_c] = RxBuffer_Loc[move_c];
// }
while (RxDone == 0) { /* xil_printf("Wait for intrupt \r\n"); NOP */ }
if (Error) {
xil_printf("Failed test transmit %s done, receive %s done\r\n", TxDone? "":" not", RxDone? "":" not");
......@@ -424,10 +400,7 @@ static void DMA_Transfer_init()
XAxiDma_IntrEnable(&AxiDma, XAXIDMA_IRQ_ALL_MASK,
XAXIDMA_DMA_TO_DEVICE);
XAxiDma_IntrEnable(&AxiDma, XAXIDMA_IRQ_ALL_MASK,
XAXIDMA_DEVICE_TO_DMA);
}
c_baremetal/DMA_Transfer_def.h
......@@ -3,19 +3,17 @@
#include "xaxidma.h"
//#include "platform.h"
#include "xil_printf.h"
#include "xparameters.h"
//#include "xtime_l.h"
#include <inttypes.h>
//#include "Output_FIFO.h"
//#include "Add_Constant.h"
#include "Output_FIFO_2clk.h"
#include "xparameters.h"
#include "xil_exception.h"
#include "xdebug.h"
#include "xscugic.h"
#include "xtmrctr.h"
//#include "platform.h"
//#include "xtime_l.h"
#include <stdio.h>
#include <stdlib.h>
......@@ -27,23 +25,17 @@
#define TMR_DEVICE_ID XPAR_TMRCTR_0_DEVICE_ID
#define INTC_TMR_INTERRUPT_ID XPAR_FABRIC_AXI_TIMER_0_INTERRUPT_INTR
#define MEM_BASE_ADDR XPAR_PS7_RAM_0_S_AXI_BASEADDR
#define ADD_CONST_ID XPAR_ADD_CONSTANT_0_DEVICE_ID
//#define ADD_CONST_BASE_ADDR XPAR_ADD_CONSTANT_0_S00_AXI_BASEADDR
//#define ADD_CONST_OFFSET ADD_CONSTANT_S00_AXI_SLV_REG0_OFFSET
#define OUTPUT_FIFO_ID XPAR_OUTPUT_FIFO_0_DEVICE_ID
#define OUTPUT_FIFO_BASE_ADDR XPAR_OUTPUT_FIFO_2CLK_0_S00_AXI_BASEADDR
#define OUTPUT_FIFO_transfer_length_OFFSET OUTPUT_FIFO_2CLK_S00_AXI_SLV_REG0_OFFSET
#define OUTPUT_FIFO_start_delay_OFFSET OUTPUT_FIFO_2CLK_S00_AXI_SLV_REG1_OFFSET
#define OUTPUT_FIFO_time_out_OFFSET OUTPUT_FIFO_2CLK_S00_AXI_SLV_REG2_OFFSET
#define CLK_WIZ_BASE_ADDR XPAR_CLK_WIZ_0_BASEADDR
#define CLK_WIZ_BASE_ADDR XPAR_CLK_WIZ_0_BASEADDR
#define RX_INTR_ID XPAR_FABRIC_AXI_DMA_0_S2MM_INTROUT_INTR
#define TX_INTR_ID XPAR_FABRIC_AXI_DMA_0_MM2S_INTROUT_INTR
#define INTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID
#define INTC XScuGic
......@@ -52,13 +44,13 @@
/* Timeout loop counter for reset */
#define RESET_TIMEOUT_COUNTER 10000
#define RUN_DMA 0
#define HW_MULT 0
// #define RUN_DMA 0
// #define HW_MULT 0
#define DEBUG_HW 0
#define INIT_TIME 0
#define POLY_MUL_EXE 1
/* Set to 1 to measure Poly Mult execution time */
#define POLY_MUL_EXE 0
/************************** Variable Definitions *****************************/
......@@ -74,11 +66,9 @@ XTmrCtr TMRInst;
XAxiDma_Config *Config;
int Status;
#define CHANNEL 1
#define ALL_OUTPUT 0x0
/*
* Flags interrupt handlers use to notify the application context the events.
*/
......@@ -86,23 +76,30 @@ volatile int TxDone;
volatile int RxDone;
volatile int Error;
u32 execution_time;
//u32 clk_wiz_status=0;
//u32 clk_wiz_VCO_conf = 0x00000A01;
//u32 clk_wiz_CLK0_conf = 0x00000002;
u32 sw_keygen_time, sw_encaps_time, sw_decaps_time,
hw_encaps_time, hw_decaps_time;
u32 clk_wiz_status;
u32 clk_wiz_VCO_conf;
u32 clk_wiz_CLK0_conf;
u32 error_count;
float clk_conf_tmp;
float accel_freq;
unsigned int clk_conf_tmp_int;
unsigned int int_part;
unsigned int float_part;
//extern XTime time_array[3][2];
int firstrun;
int HW_MULT;
u32 ARRAY_LENGTH_TX;
u32 ARRAY_LENGTH_RX;
static int DMA_Transfer(dma_t *TxBuffer, u32 ARRAY_LENGTH_TX_in, dma_t *RxBuffer, u32 ARRAY_LENGTH_RX_in);
static int DMA_Transfer(dma_t *TxBuffer, u32 ARRAY_LENGTH_TX_in,
dma_t *RxBuffer, u32 ARRAY_LENGTH_RX_in);
#ifndef DEBUG
extern void xil_printf(const char *format, ...);
......
c_baremetal/clk_wiz_driver.h 0 → 100644
// =============================================================================
// Copyright © 2017-2018 by Cryptographic Engineering Research Group (CERG),
// ECE Department, George Mason University
// Fairfax, VA, U.S.A.
// Author: Farnoud Farahmand
// =============================================================================
#include "xil_types.h"
#include "xstatus.h"
#define clk_wiz_S_AXI_Software_Reset_OFFSET 0x0
#define clk_wiz_S_AXI_SLV_Status_Reg_OFFSET 0x04
#define clk_wiz_S_AXI_clk_Conf_Reg0_OFFSET 0x200
#define clk_wiz_S_AXI_clk_Conf_Reg1_OFFSET 0x204
#define clk_wiz_S_AXI_clk_Conf_Reg2_OFFSET 0x208
#define clk_wiz_S_AXI_clk_Conf_Reg3_OFFSET 0x20C
#define clk_wiz_S_AXI_clk_Conf_Reg4_OFFSET 0x210
#define clk_wiz_S_AXI_clk_Conf_Reg5_OFFSET 0x214
#define clk_wiz_S_AXI_clk_Conf_Reg6_OFFSET 0x218
#define clk_wiz_S_AXI_clk_Conf_Reg7_OFFSET 0x21C
#define clk_wiz_S_AXI_clk_Conf_Reg8_OFFSET 0x220
#define clk_wiz_S_AXI_clk_Conf_Reg9_OFFSET 0x224
#define clk_wiz_S_AXI_clk_Conf_Reg10_OFFSET 0x228
#define clk_wiz_S_AXI_clk_Conf_Reg11_OFFSET 0x22C
#define clk_wiz_S_AXI_clk_Conf_Reg12_OFFSET 0x230
#define clk_wiz_S_AXI_clk_Conf_Reg13_OFFSET 0x234
#define clk_wiz_S_AXI_clk_Conf_Reg14_OFFSET 0x238
#define clk_wiz_S_AXI_clk_Conf_Reg15_OFFSET 0x23C
#define clk_wiz_S_AXI_clk_Conf_Reg16_OFFSET 0x240
#define clk_wiz_S_AXI_clk_Conf_Reg17_OFFSET 0x244
#define clk_wiz_S_AXI_clk_Conf_Reg18_OFFSET 0x248
#define clk_wiz_S_AXI_clk_Conf_Reg19_OFFSET 0x24C
#define clk_wiz_S_AXI_clk_Conf_Reg20_OFFSET 0x250
#define clk_wiz_S_AXI_clk_Conf_Reg21_OFFSET 0x254
#define clk_wiz_S_AXI_clk_Conf_Reg22_OFFSET 0x258
#define clk_wiz_S_AXI_clk_Conf_Reg23_OFFSET 0x25C
#define clk_wiz_mWriteReg(BaseAddress, RegOffset, Data) \
Xil_Out32((BaseAddress) + (RegOffset), (u32)(Data))
#define clk_wiz_mReadReg(BaseAddress, RegOffset) \
Xil_In32((BaseAddress) + (RegOffset))
script/generate_bitstream_102.tcl
start_gui
#start_gui
#create_project PLATFORM_PROJECT ../vivado_project/platform_project -part xczu7ev-ffvc1156-2-e
create_project PLATFORM_PROJECT ../vivado_project/platform_project -part xczu9eg-ffvb1156-2-e
#set_property board_part xilinx.com:zcu104:part0:1.1 [current_project]
......
script/generate_bitstream_104.tcl
start_gui
#start_gui
create_project PLATFORM_PROJECT ../vivado_project/platform_project -part xczu7ev-ffvc1156-2-e
set_property board_part xilinx.com:zcu104:part0:1.1 [current_project]
set_property coreContainer.enable 1 [current_project]
......
script/run_vivado.sh
#!/bin/bash
rm -rf ../vivado_project/platform_project
mkdir ../vivado_project/platform_project
if [ "$1" = "ZCU102" ]
then
if [ "$2" = "GUI" ]
then
vivado -source ./generate_bitstream_102.tcl
else
vivado -mode batch -source ./generate_bitstream_102.tcl
fi
else
if [ "$2" = "GUI" ]
then
vivado -source ./generate_bitstream_104.tcl
else
vivado -mode batch -source ./generate_bitstream_104.tcl
fi
fi
#vivado -mode batch -source ./generate_bitstream.tcl
vivado -source ./generate_bitstream_104.tcl
#vivado -source ./generate_bitstream_104.tcl
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