ASIC Hash Function Results Table

All results are categorized in groups, e.g., Algorithm, Design , Platform, etc. Clicking on the group name reveals additional columns for the respective group. Clicking on the group name again collapses the group.

Each column has a column title e.g. Result ID, Primary Opt. Target, TP [Mbits/s] (meaning Throughput) etc. Clicking on the column title sorts the column in ascending order, clicking on it again sorts it in descending order. In addition, the little arrow next to the title changes color to indicate the sort order and the column is shaded. A second order of sorting can be achieved by pressing the "Shift" key on the keyboard and then clicking on another column title.

At the bottom of each column is a search box. Any entry in these boxes is only applied to the respective column. The search is not case sensitive, and is regex based. An OR operation can be accomplished by surrounding search terms w/ parenthesis and seperating them with a pipe, like so:

(term1|term2)

The number of results matching the current search criteria is shown at the end of the table, below the paging buttons.

Clicking on a Result ID opens a page that shows all details about that particular result.

To compare two results, click one result, then another to compare against. Then click the 'Compare Selected Results' action

In order to preserve the state of the table when examining a result, please right-click and select "open in new window" or "open in new tab". Alternatively, use middle click on a result id.

Numeric and date columns may be searched using by specifying a range in ISO interval notation, or a simple one sided bound using >. For example, to search for all results with values between 1000 and 2000, inclusive, use:

[1000,2000]

To search for values greater than 2000 exclusive, use:

> 2000
Date ranges may also be entered using a date picker, activated by clicking "Enter Date Range" below the appropriate field.

Compare Selected

Result ID	Group	Algorithm	Hash Size [bits]	Msg Blk Size [bits]	Design ID	Primary Opt Target	Language	Secondary Opt Target	Arch Type	Max #Streams	Clk Cycles per Block	Datapath Width [bits]	Padding	Input Bus Width [bits]	Src Avail	Publication URL	Lib Vendors	Library Names	Technology [nm]	Die Size [mm²]	Chip Status	Post-Layout Clk Freq [MHz]	Post-Layout TP [Mbits/s]	Post-Layout TP/Area [(Mbits/s)/kGEs]	Measured Clk Freq [MHz]	Measured TP [Mbits/s]	Measured TP/Area [(Mbits/s)/kGEs]	Post-Synthesis Area [μm²]	Post-Synthesis Area [kGE]	Post-Layout Area [μm²]	Post-Layout Area [kGE]	Post-Layout Power [mW]	Post-Layout Energy/Bit [mJ/Gbit]	Measured Power [mW]	Measured Energy/Bit [mJ/Gbit]	Synthesis Tool	Synth Tools Version	Backend Tools	Backend Tools Version	Primary Designer Name(s)	Primary Designer Affiliation	Result Modify Date	Design Entered By